Lines Matching refs:db
207 struct uli526x_board_info *db; /* board information structure */ in uli526x_initialize() local
228 db = (struct uli526x_board_info *) in uli526x_initialize()
231 dev->priv = db; in uli526x_initialize()
232 db->pdev = devno; in uli526x_initialize()
241 db->ioaddr = dev->iobase; in uli526x_initialize()
244 pci_read_config_dword(devno, PCI_VENDOR_ID, &db->chip_id); in uli526x_initialize()
247 printf("uli526x: chip_id%x\n", db->chip_id); in uli526x_initialize()
260 struct uli526x_board_info *db = dev->priv; in uli526x_init_one() local
276 db->desc_pool_ptr = (uchar *)&desc_pool_array[0]; in uli526x_init_one()
277 db->desc_pool_dma_ptr = (dma_addr_t)&desc_pool_array[0]; in uli526x_init_one()
278 if (db->desc_pool_ptr == NULL) in uli526x_init_one()
281 db->buf_pool_ptr = (uchar *)&buf_pool[0]; in uli526x_init_one()
282 db->buf_pool_dma_ptr = (dma_addr_t)&buf_pool[0]; in uli526x_init_one()
283 if (db->buf_pool_ptr == NULL) in uli526x_init_one()
286 db->first_tx_desc = (struct tx_desc *) db->desc_pool_ptr; in uli526x_init_one()
287 db->first_tx_desc_dma = db->desc_pool_dma_ptr; in uli526x_init_one()
289 db->buf_pool_start = db->buf_pool_ptr; in uli526x_init_one()
290 db->buf_pool_dma_start = db->buf_pool_dma_ptr; in uli526x_init_one()
294 __FUNCTION__, db->ioaddr); in uli526x_init_one()
298 __FUNCTION__, db->desc_pool_ptr); in uli526x_init_one()
300 __FUNCTION__, db->desc_pool_dma_ptr); in uli526x_init_one()
302 __FUNCTION__, db->buf_pool_ptr); in uli526x_init_one()
304 __FUNCTION__, db->buf_pool_dma_ptr); in uli526x_init_one()
309 ((u16 *) db->srom)[i] = cpu_to_le16(read_srom_word(db->ioaddr, in uli526x_init_one()
313 if (((db->srom[0] == 0xff) && (db->srom[1] == 0xff)) || in uli526x_init_one()
314 ((db->srom[0] == 0x00) && (db->srom[1] == 0x00))) in uli526x_init_one()
319 dev->enetaddr[i] = db->srom[20 + i]; in uli526x_init_one()
325 db->PHY_reg4 = 0x1e0; in uli526x_init_one()
328 db->cr6_data = CR6_DEFAULT ; in uli526x_init_one()
329 db->cr6_data |= ULI526X_TXTH_256; in uli526x_init_one()
330 db->cr0_data = CR0_DEFAULT; in uli526x_init_one()
340 struct uli526x_board_info *db = dev->priv; in uli526x_disable() local
342 if (!((inl(db->ioaddr + DCR12)) & 0x8)) { in uli526x_disable()
344 outl(ULI526X_RESET, db->ioaddr + DCR0); in uli526x_disable()
346 uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x8000, db->chip_id); in uli526x_disable()
349 db->cr6_data &= ~(CR6_RXSC | CR6_TXSC); /* Disable Tx/Rx */ in uli526x_disable()
350 update_cr6(db->cr6_data, dev->iobase); in uli526x_disable()
366 struct uli526x_board_info *db = dev->priv; in uli526x_init() local
372 outl(ULI526X_RESET, db->ioaddr + DCR0); /* RESET MAC */ in uli526x_init()
374 outl(db->cr0_data, db->ioaddr + DCR0); in uli526x_init()
378 db->phy_addr = 1; in uli526x_init()
379 db->tx_packet_cnt = 0; in uli526x_init()
382 phy_value = uli_phy_read(db->ioaddr, phy_tmp, 3, db->chip_id); in uli526x_init()
384 db->phy_addr = phy_tmp; in uli526x_init()
390 printf("%s(): db->ioaddr= 0x%x\n", __FUNCTION__, db->ioaddr); in uli526x_init()
391 printf("%s(): db->phy_addr= 0x%x\n", __FUNCTION__, db->phy_addr); in uli526x_init()
397 db->media_mode = uli526x_media_mode; in uli526x_init()
399 if (!(inl(db->ioaddr + DCR12) & 0x8)) { in uli526x_init()
401 phy_reg_reset = uli_phy_read(db->ioaddr, in uli526x_init()
402 db->phy_addr, 0, db->chip_id); in uli526x_init()
404 uli_phy_write(db->ioaddr, db->phy_addr, 0, in uli526x_init()
405 phy_reg_reset, db->chip_id); in uli526x_init()
409 uli526x_set_phyxcer(db); in uli526x_init()
412 if (!(db->media_mode & ULI526X_AUTO)) in uli526x_init()
413 db->op_mode = db->media_mode; /* Force Mode */ in uli526x_init()
416 uli526x_descriptor_init(db, db->ioaddr); in uli526x_init()
419 update_cr6(db->cr6_data, db->ioaddr); in uli526x_init()
422 db->cr7_data = CR7_DEFAULT; in uli526x_init()
423 outl(db->cr7_data, db->ioaddr + DCR7); in uli526x_init()
426 outl(db->cr15_data, db->ioaddr + DCR15); in uli526x_init()
429 db->cr6_data |= CR6_RXSC | CR6_TXSC; in uli526x_init()
430 update_cr6(db->cr6_data, db->ioaddr); in uli526x_init()
431 while (!(inl(db->ioaddr + DCR12) & 0x8)) in uli526x_init()
442 struct uli526x_board_info *db = dev->priv; in uli526x_start_xmit() local
452 if (db->tx_packet_cnt >= TX_FREE_DESC_CNT) { in uli526x_start_xmit()
453 printf("No Tx resource %ld\n", db->tx_packet_cnt); in uli526x_start_xmit()
461 txptr = db->tx_insert_ptr; in uli526x_start_xmit()
466 db->tx_insert_ptr = txptr->next_tx_desc; in uli526x_start_xmit()
469 if ((db->tx_packet_cnt < TX_DESC_CNT)) { in uli526x_start_xmit()
471 db->tx_packet_cnt++; /* Ready to send */ in uli526x_start_xmit()
476 db->cr5_data = inl(db->ioaddr + DCR5); in uli526x_start_xmit()
477 outl(db->cr5_data, db->ioaddr + DCR5); in uli526x_start_xmit()
481 printf("%s(): cr5_data=%x\n", __FUNCTION__, db->cr5_data); in uli526x_start_xmit()
484 outl(db->cr7_data, dev->iobase + DCR7); in uli526x_start_xmit()
485 uli526x_free_tx_pkt(dev, db); in uli526x_start_xmit()
495 struct uli526x_board_info *db) in uli526x_free_tx_pkt() argument
500 txptr = db->tx_remove_ptr; in uli526x_free_tx_pkt()
501 while (db->tx_packet_cnt) { in uli526x_free_tx_pkt()
508 db->tx_packet_cnt--; in uli526x_free_tx_pkt()
516 if (!(db->cr6_data & CR6_SFT)) { in uli526x_free_tx_pkt()
517 db->cr6_data = db->cr6_data | in uli526x_free_tx_pkt()
519 update_cr6(db->cr6_data, in uli526x_free_tx_pkt()
520 db->ioaddr); in uli526x_free_tx_pkt()
530 db->tx_remove_ptr = txptr; in uli526x_free_tx_pkt()
540 struct uli526x_board_info *db = dev->priv; in uli526x_rx_packet() local
545 rxptr = db->rx_ready_ptr; in uli526x_rx_packet()
570 ((db->cr6_data & CR6_PM) && (rxlen > 6))) { in uli526x_rx_packet()
602 db->rx_ready_ptr = rxptr; in uli526x_rx_packet()
623 static void uli526x_descriptor_init(struct uli526x_board_info *db, in uli526x_descriptor_init() argument
633 db->tx_insert_ptr = db->first_tx_desc; in uli526x_descriptor_init()
634 db->tx_remove_ptr = db->first_tx_desc; in uli526x_descriptor_init()
636 outl(db->first_tx_desc_dma, ioaddr + DCR4); /* TX DESC address */ in uli526x_descriptor_init()
639 db->first_rx_desc = (void *)db->first_tx_desc + in uli526x_descriptor_init()
641 db->first_rx_desc_dma = db->first_tx_desc_dma + in uli526x_descriptor_init()
643 db->rx_ready_ptr = db->first_rx_desc; in uli526x_descriptor_init()
644 outl(db->first_rx_desc_dma, ioaddr + DCR3); /* RX DESC address */ in uli526x_descriptor_init()
647 __FUNCTION__, db->first_tx_desc); in uli526x_descriptor_init()
649 __FUNCTION__, db->first_rx_desc_dma); in uli526x_descriptor_init()
652 tmp_buf = db->buf_pool_start; in uli526x_descriptor_init()
653 tmp_buf_dma = db->buf_pool_dma_start; in uli526x_descriptor_init()
654 tmp_tx_dma = db->first_tx_desc_dma; in uli526x_descriptor_init()
655 for (tmp_tx = db->first_tx_desc, i = 0; in uli526x_descriptor_init()
667 (--tmp_tx)->tdes3 = cpu_to_le32(db->first_tx_desc_dma); in uli526x_descriptor_init()
668 tmp_tx->next_tx_desc = db->first_tx_desc; in uli526x_descriptor_init()
671 tmp_rx_dma = db->first_rx_desc_dma; in uli526x_descriptor_init()
672 for (tmp_rx = db->first_rx_desc, i = 0; i < RX_DESC_CNT; in uli526x_descriptor_init()
680 (--tmp_rx)->rdes3 = cpu_to_le32(db->first_rx_desc_dma); in uli526x_descriptor_init()
681 tmp_rx->next_rx_desc = db->first_rx_desc; in uli526x_descriptor_init()
684 allocate_rx_buffer(db); in uli526x_descriptor_init()
703 static void allocate_rx_buffer(struct uli526x_board_info *db) in allocate_rx_buffer() argument
707 rxptr = db->first_rx_desc; in allocate_rx_buffer()
773 static void uli526x_set_phyxcer(struct uli526x_board_info *db) in uli526x_set_phyxcer() argument
778 phy_reg = uli_phy_read(db->ioaddr, in uli526x_set_phyxcer()
779 db->phy_addr, 4, db->chip_id) & ~0x01e0; in uli526x_set_phyxcer()
781 if (db->media_mode & ULI526X_AUTO) { in uli526x_set_phyxcer()
783 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
786 switch (db->media_mode) { in uli526x_set_phyxcer()
797 phy_reg |= db->PHY_reg4; in uli526x_set_phyxcer()
798 db->media_mode |= ULI526X_AUTO; in uli526x_set_phyxcer()
800 uli_phy_write(db->ioaddr, db->phy_addr, 4, phy_reg, db->chip_id); in uli526x_set_phyxcer()
803 uli_phy_write(db->ioaddr, db->phy_addr, 0, 0x1200, db->chip_id); in uli526x_set_phyxcer()
975 struct uli526x_board_info *db = dev->priv; in set_mac_addr() local
976 outl(0x10000, db->ioaddr + DCR0); /* Diagnosis mode */ in set_mac_addr()
978 outl(0x1c0, db->ioaddr + DCR13); in set_mac_addr()
979 outl(0, db->ioaddr + DCR14); /* Clear reset port */ in set_mac_addr()
980 outl(0x10, db->ioaddr + DCR14); /* Reset ID Table pointer */ in set_mac_addr()
981 outl(0, db->ioaddr + DCR14); /* Clear reset port */ in set_mac_addr()
982 outl(0, db->ioaddr + DCR13); /* Clear CR13 */ in set_mac_addr()
984 outl(0x1b0, db->ioaddr + DCR13); in set_mac_addr()
988 outl(addr, db->ioaddr + DCR14); in set_mac_addr()
991 outl(0, db->ioaddr + DCR13); /* Clear CR13 */ in set_mac_addr()
992 outl(0, db->ioaddr + DCR0); /* Clear CR0 */ in set_mac_addr()