drivers/net/smc911x.h

1 /* SPDX-License-Identifier: GPL-2.0+ */
24 	return *(volatile u32*)(dev->iobase + offset);  in __smc911x_reg_read()
32 	*(volatile u32*)(dev->iobase + offset) = val;  in __smc911x_reg_write()
39 	volatile u16 *addr_16 = (u16 *)(dev->iobase + offset);  in smc911x_reg_read()
45 	*(volatile u16 *)(dev->iobase + offset) = (u16)val;  in smc911x_reg_write()
46 	*(volatile u16 *)(dev->iobase + offset + 2) = (u16)(val >> 16);  in smc911x_reg_write()
53  * of the Lan911x memory space
115 #define	INT_STS_SW_INT				0x80000000  /* R/WC */
116 #define	INT_STS_TXSTOP_INT			0x02000000  /* R/WC */
117 #define	INT_STS_RXSTOP_INT			0x01000000  /* R/WC */
118 #define	INT_STS_RXDFH_INT			0x00800000  /* R/WC */
119 #define	INT_STS_RXDF_INT			0x00400000  /* R/WC */
120 #define	INT_STS_TX_IOC				0x00200000  /* R/WC */
121 #define	INT_STS_RXD_INT				0x00100000  /* R/WC */
122 #define	INT_STS_GPT_INT				0x00080000  /* R/WC */
124 #define	INT_STS_PME_INT				0x00020000  /* R/WC */
125 #define	INT_STS_TXSO				0x00010000  /* R/WC */
126 #define	INT_STS_RWT				0x00008000  /* R/WC */
127 #define	INT_STS_RXE				0x00004000  /* R/WC */
128 #define	INT_STS_TXE				0x00002000  /* R/WC */
129 /*#define	INT_STS_ERX		0x00001000*/  /* R/WC */
130 #define	INT_STS_TDFU				0x00000800  /* R/WC */
131 #define	INT_STS_TDFO				0x00000400  /* R/WC */
132 #define	INT_STS_TDFA				0x00000200  /* R/WC */
133 #define	INT_STS_TSFF				0x00000100  /* R/WC */
134 #define	INT_STS_TSFL				0x00000080  /* R/WC */
135 /*#define	INT_STS_RXDF		0x00000040*/  /* R/WC */
136 #define	INT_STS_RDFO				0x00000040  /* R/WC */
137 #define	INT_STS_RDFL				0x00000020  /* R/WC */
138 #define	INT_STS_RSFF				0x00000010  /* R/WC */
139 #define	INT_STS_RSFL				0x00000008  /* R/WC */
140 #define	INT_STS_GPIO2_INT			0x00000004  /* R/WC */
141 #define	INT_STS_GPIO1_INT			0x00000002  /* R/WC */
142 #define	INT_STS_GPIO0_INT			0x00000001  /* R/WC */
235 #define	PMT_CTRL_WUPS				0x00000030  /* R/WC */
236 #define	PMT_CTRL_WUPS_NOWAKE			0x00000000  /* R/WC */
237 #define	PMT_CTRL_WUPS_ED			0x00000010  /* R/WC */
238 #define	PMT_CTRL_WUPS_WOL			0x00000020  /* R/WC */
239 #define	PMT_CTRL_WUPS_MULTI			0x00000030  /* R/WC */
313 /* MAC_CR - MAC Control Register */
432 		/* Special case -- no chip present */  in smc911x_detect_chip()
433 		return -1;  in smc911x_detect_chip()
436 		return -1;  in smc911x_detect_chip()
445 		return -1;  in smc911x_detect_chip()
448 	dev->priv = (void *)&chip_ids[i];  in smc911x_detect_chip()
467 		while (timeout-- &&  in smc911x_reset()
483 	while (timeout-- && smc911x_reg_read(dev, E2P_CMD) & E2P_CMD_EPC_BUSY)  in smc911x_reset()