100 #define RTL_W32(reg, val32)	writel((val32), ioaddr + (reg))  macro
351 	RTL_W32(PHYAR, 0x80000000 | (RegAddr & 0xFF) << 16 | value);  in mdio_write()
368 	RTL_W32(PHYAR, 0x0 | (RegAddr & 0xFF) << 16);  in mdio_read()
708 	RTL_W32(RxConfig, tmp);  in rtl8169_set_rx_mode()
709 	RTL_W32(MAR0 + 0, mc_filter[0]);  in rtl8169_set_rx_mode()
710 	RTL_W32(MAR0 + 4, mc_filter[1]);  in rtl8169_set_rx_mode()
753 	RTL_W32(RxConfig, i);  in rtl8169_hw_start()
756 	RTL_W32(TxConfig, (TX_DMA_BURST << TxDMAShift) |  in rtl8169_hw_start()
763 	RTL_W32(TxDescStartAddrLow, dm_pci_mem_to_phys(dev,  in rtl8169_hw_start()
766 	RTL_W32(TxDescStartAddrLow, pci_mem_to_phys(dev,  in rtl8169_hw_start()
769 	RTL_W32(TxDescStartAddrHigh, (unsigned long)0);  in rtl8169_hw_start()
771 	RTL_W32(RxDescStartAddrLow, dm_pci_mem_to_phys(  in rtl8169_hw_start()
774 	RTL_W32(RxDescStartAddrLow, pci_mem_to_phys(  in rtl8169_hw_start()
777 	RTL_W32(RxDescStartAddrHigh, (unsigned long)0);  in rtl8169_hw_start()
786 	RTL_W32(RxMissed, 0);  in rtl8169_hw_start()
920 	RTL_W32(RxMissed, 0);  in rtl_halt_common()