57 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mii_init()  local
75 	writel(EMAC_SOFTRESET, &emac_p->cfg1.set); /* reset assert */  in pic32_mii_init()
77 	writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */  in pic32_mii_init()
81 		writel(EMAC_RMII_RESET, &emac_p->supp.set);  in pic32_mii_init()
83 		writel(EMAC_RMII_RESET, &emac_p->supp.clr);  in pic32_mii_init()
86 	return pic32_mdio_init(PIC32_MDIO_NAME, (ulong)&emac_p->mii);  in pic32_mii_init()
130 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mac_adjust_link()  local
138 		writel(EMAC_FULLDUP, &emac_p->cfg2.set);  in pic32_mac_adjust_link()
139 		writel(FULLDUP_GAP_TIME, &emac_p->ipgt.raw);  in pic32_mac_adjust_link()
141 		writel(EMAC_FULLDUP, &emac_p->cfg2.clr);  in pic32_mac_adjust_link()
142 		writel(HALFDUP_GAP_TIME, &emac_p->ipgt.raw);  in pic32_mac_adjust_link()
147 		writel(EMAC_RMII_SPD100, &emac_p->supp.set);  in pic32_mac_adjust_link()
150 		writel(EMAC_RMII_SPD100, &emac_p->supp.clr);  in pic32_mac_adjust_link()
167 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mac_init()  local
172 	writel(v, &emac_p->cfg1.raw);  in pic32_mac_init()
176 	writel(v, &emac_p->cfg2.raw);  in pic32_mac_init()
179 	writel(HALFDUP_GAP_TIME, &emac_p->ipgt.raw);  in pic32_mac_init()
182 	writel(0xc12, &emac_p->ipgr.raw);  in pic32_mac_init()
185 	writel(0x370f, &emac_p->clrt.raw);  in pic32_mac_init()
188 	writel(0x600, &emac_p->maxf.raw);  in pic32_mac_init()
191 	writel(macaddr[0] | (macaddr[1] << 8), &emac_p->sa2.raw);  in pic32_mac_init()
192 	writel(macaddr[2] | (macaddr[3] << 8), &emac_p->sa1.raw);  in pic32_mac_init()
193 	writel(macaddr[4] | (macaddr[5] << 8), &emac_p->sa0.raw);  in pic32_mac_init()
196 	writel(EMAC_RMII_SPD100, &emac_p->supp.clr);  in pic32_mac_init()
215 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_mac_reset()  local
219 	writel(EMAC_SOFTRESET, &emac_p->cfg1.raw);  in pic32_mac_reset()
223 	writel(0, &emac_p->cfg1.raw);  in pic32_mac_reset()
352 	struct pic32_emac_regs *emac_p = priv->emac_regs;  in pic32_eth_stop()  local
366 	writel(EMAC_SOFTRESET, &emac_p->cfg1.raw);  in pic32_eth_stop()
369 	writel(0, &emac_p->cfg1.raw);  in pic32_eth_stop()