Lines Matching refs:MIIM_BCM54xx_AUXCNTL

12 #define MIIM_BCM54xx_AUXCNTL			0x18  macro
41 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL,  in bcm_phy_write_misc()
44 	reg_val = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL);  in bcm_phy_write_misc()
46 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg_val);  in bcm_phy_write_misc()
64 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL,  in bcm5461_config()
66 	reg18 = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL);  in bcm5461_config()
72 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg18);  in bcm5461_config()
170 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL,  in bcm5482_config()
173 	reg = bcm5482_read_wirespeed(phydev, MIIM_BCM54xx_AUXCNTL);  in bcm5482_config()
174 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, reg);  in bcm5482_config()
208 	phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54xx_AUXCNTL, 0x0c30);  in bcm_cygnus_afe()