96 	MVGBE_REG_WR(MVGBE_SMI_REG, smi_reg);  in __mvgbe_mdio_read()
150 		MVGBE_REG_WR(regs->phyadr, data);  in __mvgbe_mdio_write()
175 	MVGBE_REG_WR(MVGBE_SMI_REG, smi_reg);  in __mvgbe_mdio_write()
241 	MVGBE_REG_WR(regs->epap, access_prot_reg);  in set_access_control()
244 	MVGBE_REG_WR(regs->barsz[param->win].size,  in set_access_control()
248 	MVGBE_REG_WR(regs->barsz[param->win].bar,  in set_access_control()
252 		MVGBE_REG_WR(regs->ha_remap[param->win], param->high_addr);  in set_access_control()
319 		MVGBE_REG_WR(regs->dfut[table_index], 0);  in port_init_mac_tables()
323 		MVGBE_REG_WR(regs->dfsmt[table_index], 0);  in port_init_mac_tables()
325 		MVGBE_REG_WR(regs->dfomt[table_index], 0);  in port_init_mac_tables()
365 		MVGBE_REG_WR(regs->dfut[tbl_offset], unicast_reg);  in port_uc_addr()
372 		MVGBE_REG_WR(regs->dfut[tbl_offset], unicast_reg);  in port_uc_addr()
393 	MVGBE_REG_WR(regs->macal, mac_l);  in port_uc_addr_set()
394 	MVGBE_REG_WR(regs->macah, mac_h);  in port_uc_addr_set()
441 	MVGBE_REG_WR(regs->ic, 0);  in __mvgbe_init()
442 	MVGBE_REG_WR(regs->ice, 0);  in __mvgbe_init()
444 	MVGBE_REG_WR(regs->pim, INT_CAUSE_UNMASK_ALL);  in __mvgbe_init()
446 	MVGBE_REG_WR(regs->peim, INT_CAUSE_UNMASK_ALL_EXT);  in __mvgbe_init()
453 	MVGBE_REG_WR(regs->pxc, PRT_CFG_VAL);  in __mvgbe_init()
454 	MVGBE_REG_WR(regs->pxcx, PORT_CFG_EXTEND_VALUE);  in __mvgbe_init()
455 	MVGBE_REG_WR(regs->psc0, PORT_SERIAL_CONTROL_VALUE);  in __mvgbe_init()
458 	MVGBE_REG_WR(regs->sdc, PORT_SDMA_CFG_VALUE);  in __mvgbe_init()
459 	MVGBE_REG_WR(regs->tqx[0].qxttbc, QTKNBKT_DEF_VAL);  in __mvgbe_init()
460 	MVGBE_REG_WR(regs->tqx[0].tqxtbc,  in __mvgbe_init()
463 	MVGBE_REG_WR(regs->pmtu, 0);  in __mvgbe_init()
466 	MVGBE_REG_WR(regs->psc0, MVGBE_MAX_RX_PACKET_9700BYTE  in __mvgbe_init()
476 	MVGBE_REG_WR(regs->pmtu, 0);  in __mvgbe_init()
479 	MVGBE_REG_WR(regs->rxcdp[RXUQ], (u32) dmvgbe->p_rxdesc_curr);  in __mvgbe_init()
483 	MVGBE_REG_WR(regs->rqc, (1 << RXUQ));  in __mvgbe_init()
521 	MVGBE_REG_WR(regs->bare, 0x3f);  in __mvgbe_halt()
535 	MVGBE_REG_WR(regs->ic, 0);  in __mvgbe_halt()
536 	MVGBE_REG_WR(regs->ice, 0);  in __mvgbe_halt()
537 	MVGBE_REG_WR(regs->pim, 0);  in __mvgbe_halt()
538 	MVGBE_REG_WR(regs->peim, 0);  in __mvgbe_halt()
608 	MVGBE_REG_WR(regs->tqc, (1 << TXUQ));  in __mvgbe_send()