Lines Matching +full:disable +full:- +full:eop
19 #include <asm/dma-mapping.h>
41 next->descriptor_control = next->descriptor_control & in alt_sgdma_construct_descriptor()
45 desc->source = virt_to_phys(read_addr); in alt_sgdma_construct_descriptor()
46 desc->destination = virt_to_phys(write_addr); in alt_sgdma_construct_descriptor()
47 desc->next = virt_to_phys(next); in alt_sgdma_construct_descriptor()
48 desc->bytes_to_transfer = length_or_eop; in alt_sgdma_construct_descriptor()
52 * - Set "owned by hardware" bit in alt_sgdma_construct_descriptor()
53 * - Optionally set "generate EOP" bit in alt_sgdma_construct_descriptor()
54 * - Optionally set the "read from fixed address" bit in alt_sgdma_construct_descriptor()
55 * - Optionally set the "write to fixed address bit (which serves in alt_sgdma_construct_descriptor()
56 * serves as a "generate SOP" control bit in memory-to-stream mode). in alt_sgdma_construct_descriptor()
57 * - Set the 4-bit atlantic channel, if specified in alt_sgdma_construct_descriptor()
71 desc->descriptor_control = val; in alt_sgdma_construct_descriptor()
82 status = readl(®s->status); in alt_sgdma_wait_transfer()
86 status = -ETIMEDOUT; in alt_sgdma_wait_transfer()
93 writel(0, ®s->control); in alt_sgdma_wait_transfer()
95 writel(0xff, ®s->status); in alt_sgdma_wait_transfer()
106 writel(virt_to_phys(desc), ®s->next_descriptor_pointer); in alt_sgdma_start_transfer()
110 * - Disable interrupt generation in alt_sgdma_start_transfer()
111 * - Run once a valid descriptor is written to controller in alt_sgdma_start_transfer()
112 * - Stop on an error with any particular descriptor in alt_sgdma_start_transfer()
115 writel(val, ®s->control); in alt_sgdma_start_transfer()
123 struct alt_tse_mac *mac_dev = priv->mac_dev; in tse_adjust_link()
126 if (!phydev->link) { in tse_adjust_link()
127 debug("%s: No link.\n", phydev->dev->name); in tse_adjust_link()
131 refvar = readl(&mac_dev->command_config); in tse_adjust_link()
133 if (phydev->duplex) in tse_adjust_link()
138 switch (phydev->speed) { in tse_adjust_link()
152 writel(refvar, &mac_dev->command_config); in tse_adjust_link()
158 struct alt_sgdma_descriptor *tx_desc = priv->tx_desc; in altera_tse_send_sgdma()
165 length, /* length or EOP ,will change for each tx */ in altera_tse_send_sgdma()
166 1, /* gen eop */ in altera_tse_send_sgdma()
172 alt_sgdma_start_transfer(priv->sgdma_tx, tx_desc); in altera_tse_send_sgdma()
173 alt_sgdma_wait_transfer(priv->sgdma_tx); in altera_tse_send_sgdma()
174 debug("sent %d bytes\n", tx_desc->actual_bytes_transferred); in altera_tse_send_sgdma()
176 return tx_desc->actual_bytes_transferred; in altera_tse_send_sgdma()
183 struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; in altera_tse_recv_sgdma()
186 if (rx_desc->descriptor_status & in altera_tse_recv_sgdma()
188 alt_sgdma_wait_transfer(priv->sgdma_rx); in altera_tse_recv_sgdma()
189 packet_length = rx_desc->actual_bytes_transferred; in altera_tse_recv_sgdma()
191 *packetp = priv->rx_buf; in altera_tse_recv_sgdma()
196 return -EAGAIN; in altera_tse_recv_sgdma()
203 struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; in altera_tse_free_pkt_sgdma()
209 priv->rx_buf, /* write addr */ in altera_tse_free_pkt_sgdma()
210 0, /* length or EOP */ in altera_tse_free_pkt_sgdma()
211 0, /* gen eop */ in altera_tse_free_pkt_sgdma()
217 alt_sgdma_start_transfer(priv->sgdma_rx, rx_desc); in altera_tse_free_pkt_sgdma()
225 struct alt_tse_mac *mac_dev = priv->mac_dev; in altera_tse_stop_mac()
230 writel(ALTERA_TSE_CMD_SW_RESET_MSK, &mac_dev->command_config); in altera_tse_stop_mac()
233 status = readl(&mac_dev->command_config); in altera_tse_stop_mac()
246 struct alt_sgdma_registers *rx_sgdma = priv->sgdma_rx; in altera_tse_stop_sgdma()
247 struct alt_sgdma_registers *tx_sgdma = priv->sgdma_tx; in altera_tse_stop_sgdma()
248 struct alt_sgdma_descriptor *rx_desc = priv->rx_desc; in altera_tse_stop_sgdma()
252 rx_desc->descriptor_control = 0; in altera_tse_stop_sgdma()
253 writel(0, &rx_sgdma->control); in altera_tse_stop_sgdma()
255 if (ret == -ETIMEDOUT) in altera_tse_stop_sgdma()
257 &rx_sgdma->control); in altera_tse_stop_sgdma()
259 writel(0, &tx_sgdma->control); in altera_tse_stop_sgdma()
261 if (ret == -ETIMEDOUT) in altera_tse_stop_sgdma()
263 &tx_sgdma->control); in altera_tse_stop_sgdma()
272 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_reset()
273 writel(MSGDMA_CSR_CTL_RESET, &csr->control); in msgdma_reset()
276 status = readl(&csr->status); in msgdma_reset()
285 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_reset()
296 status = readl(&csr->status); in msgdma_wait()
305 writel(MSGDMA_CSR_STAT_MASK, &csr->status); in msgdma_wait()
314 struct msgdma_extended_desc *desc = priv->tx_desc; in altera_tse_send_msgdma()
318 writel(tx_buf, &desc->read_addr_lo); in altera_tse_send_msgdma()
319 writel(0, &desc->read_addr_hi); in altera_tse_send_msgdma()
320 writel(0, &desc->write_addr_lo); in altera_tse_send_msgdma()
321 writel(0, &desc->write_addr_hi); in altera_tse_send_msgdma()
322 writel(length, &desc->len); in altera_tse_send_msgdma()
323 writel(0, &desc->burst_seq_num); in altera_tse_send_msgdma()
324 writel(MSGDMA_DESC_TX_STRIDE, &desc->stride); in altera_tse_send_msgdma()
325 writel(MSGDMA_DESC_CTL_TX_SINGLE, &desc->control); in altera_tse_send_msgdma()
326 status = msgdma_wait(priv->sgdma_tx); in altera_tse_send_msgdma()
336 struct msgdma_csr *csr = priv->sgdma_rx; in altera_tse_recv_msgdma()
337 struct msgdma_response *resp = priv->rx_resp; in altera_tse_recv_msgdma()
340 level = readl(&csr->resp_fill_level); in altera_tse_recv_msgdma()
342 length = readl(&resp->bytes_transferred); in altera_tse_recv_msgdma()
343 status = readl(&resp->status); in altera_tse_recv_msgdma()
345 *packetp = priv->rx_buf; in altera_tse_recv_msgdma()
350 return -EAGAIN; in altera_tse_recv_msgdma()
357 struct msgdma_extended_desc *desc = priv->rx_desc; in altera_tse_free_pkt_msgdma()
358 u32 rx_buf = virt_to_phys(priv->rx_buf); in altera_tse_free_pkt_msgdma()
360 writel(0, &desc->read_addr_lo); in altera_tse_free_pkt_msgdma()
361 writel(0, &desc->read_addr_hi); in altera_tse_free_pkt_msgdma()
362 writel(rx_buf, &desc->write_addr_lo); in altera_tse_free_pkt_msgdma()
363 writel(0, &desc->write_addr_hi); in altera_tse_free_pkt_msgdma()
364 writel(PKTSIZE_ALIGN, &desc->len); in altera_tse_free_pkt_msgdma()
365 writel(0, &desc->burst_seq_num); in altera_tse_free_pkt_msgdma()
366 writel(MSGDMA_DESC_RX_STRIDE, &desc->stride); in altera_tse_free_pkt_msgdma()
367 writel(MSGDMA_DESC_CTL_RX_SINGLE, &desc->control); in altera_tse_free_pkt_msgdma()
377 msgdma_reset(priv->sgdma_rx); in altera_tse_stop_msgdma()
378 msgdma_reset(priv->sgdma_tx); in altera_tse_stop_msgdma()
383 struct altera_tse_priv *priv = bus->priv; in tse_mdio_read()
384 struct alt_tse_mac *mac_dev = priv->mac_dev; in tse_mdio_read()
388 writel(addr, &mac_dev->mdio_phy1_addr); in tse_mdio_read()
390 value = readl(&mac_dev->mdio_phy1[reg]); in tse_mdio_read()
398 struct altera_tse_priv *priv = bus->priv; in tse_mdio_write()
399 struct alt_tse_mac *mac_dev = priv->mac_dev; in tse_mdio_write()
402 writel(addr, &mac_dev->mdio_phy1_addr); in tse_mdio_write()
404 writel(val, &mac_dev->mdio_phy1[reg]); in tse_mdio_write()
415 return -ENOMEM; in tse_mdio_init()
418 bus->read = tse_mdio_read; in tse_mdio_init()
419 bus->write = tse_mdio_write; in tse_mdio_init()
420 snprintf(bus->name, sizeof(bus->name), "%s", name); in tse_mdio_init()
422 bus->priv = (void *)priv; in tse_mdio_init()
432 if (priv->phyaddr) in tse_phy_init()
433 mask = 1 << priv->phyaddr; in tse_phy_init()
435 phydev = phy_find_by_mask(priv->bus, mask, priv->interface); in tse_phy_init()
437 return -ENODEV; in tse_phy_init()
441 phydev->supported &= PHY_GBIT_FEATURES; in tse_phy_init()
442 phydev->advertising = phydev->supported; in tse_phy_init()
444 priv->phydev = phydev; in tse_phy_init()
453 struct alt_tse_mac *mac_dev = priv->mac_dev; in altera_tse_write_hwaddr()
455 u8 *hwaddr = pdata->enetaddr; in altera_tse_write_hwaddr()
463 writel(mac_lo, &mac_dev->mac_addr_0); in altera_tse_write_hwaddr()
464 writel(mac_hi, &mac_dev->mac_addr_1); in altera_tse_write_hwaddr()
465 writel(mac_lo, &mac_dev->supp_mac_addr_0_0); in altera_tse_write_hwaddr()
466 writel(mac_hi, &mac_dev->supp_mac_addr_0_1); in altera_tse_write_hwaddr()
467 writel(mac_lo, &mac_dev->supp_mac_addr_1_0); in altera_tse_write_hwaddr()
468 writel(mac_hi, &mac_dev->supp_mac_addr_1_1); in altera_tse_write_hwaddr()
469 writel(mac_lo, &mac_dev->supp_mac_addr_2_0); in altera_tse_write_hwaddr()
470 writel(mac_hi, &mac_dev->supp_mac_addr_2_1); in altera_tse_write_hwaddr()
471 writel(mac_lo, &mac_dev->supp_mac_addr_3_0); in altera_tse_write_hwaddr()
472 writel(mac_hi, &mac_dev->supp_mac_addr_3_1); in altera_tse_write_hwaddr()
484 return priv->ops->send(dev, packet, length); in altera_tse_send()
491 return priv->ops->recv(dev, flags, packetp); in altera_tse_recv()
498 unsigned long rx_buf = (unsigned long)priv->rx_buf; in altera_tse_free_pkt()
502 return priv->ops->free_pkt(dev, packet, length); in altera_tse_free_pkt()
509 priv->ops->stop(dev); in altera_tse_stop()
516 struct alt_tse_mac *mac_dev = priv->mac_dev; in altera_tse_start()
522 altera_tse_free_pkt(dev, priv->rx_buf, PKTSIZE_ALIGN); in altera_tse_start()
526 writel(PKTSIZE_ALIGN, &mac_dev->max_frame_length); in altera_tse_start()
527 writel(priv->rx_fifo_depth - 16, &mac_dev->rx_sel_empty_threshold); in altera_tse_start()
528 writel(0, &mac_dev->rx_sel_full_threshold); in altera_tse_start()
529 writel(priv->tx_fifo_depth - 16, &mac_dev->tx_sel_empty_threshold); in altera_tse_start()
530 writel(0, &mac_dev->tx_sel_full_threshold); in altera_tse_start()
531 writel(8, &mac_dev->rx_almost_empty_threshold); in altera_tse_start()
532 writel(8, &mac_dev->rx_almost_full_threshold); in altera_tse_start()
533 writel(8, &mac_dev->tx_almost_empty_threshold); in altera_tse_start()
534 writel(3, &mac_dev->tx_almost_full_threshold); in altera_tse_start()
537 writel(0, &mac_dev->rx_cmd_stat); in altera_tse_start()
538 writel(0, &mac_dev->tx_cmd_stat); in altera_tse_start()
542 writel(val, &mac_dev->command_config); in altera_tse_start()
545 ret = phy_startup(priv->phydev); in altera_tse_start()
548 priv->phydev->dev->name); in altera_tse_start()
552 tse_adjust_link(priv, priv->phydev); in altera_tse_start()
554 if (!priv->phydev->link) in altera_tse_start()
555 return -EIO; in altera_tse_start()
578 void *blob = (void *)gd->fdt_blob; in altera_tse_probe()
588 priv->dma_type = dev_get_driver_data(dev); in altera_tse_probe()
589 if (priv->dma_type == ALT_SGDMA) in altera_tse_probe()
590 priv->ops = &tse_sgdma_ops; in altera_tse_probe()
592 priv->ops = &tse_msgdma_ops; in altera_tse_probe()
595 * match with reg-names. in altera_tse_probe()
599 list = fdt_getprop(blob, node, "reg-names", &len); in altera_tse_probe()
601 return -ENOENT; in altera_tse_probe()
605 return -ENOENT; in altera_tse_probe()
614 priv->mac_dev = base; in altera_tse_probe()
616 priv->sgdma_rx = base; in altera_tse_probe()
618 priv->rx_desc = base; in altera_tse_probe()
620 priv->rx_resp = base; in altera_tse_probe()
622 priv->sgdma_tx = base; in altera_tse_probe()
624 priv->tx_desc = base; in altera_tse_probe()
631 priv->rx_fifo_depth = fdtdec_get_int(blob, node, in altera_tse_probe()
632 "rx-fifo-depth", 0); in altera_tse_probe()
633 priv->tx_fifo_depth = fdtdec_get_int(blob, node, in altera_tse_probe()
634 "tx-fifo-depth", 0); in altera_tse_probe()
637 "phy-handle", 0); in altera_tse_probe()
639 priv->phyaddr = fdtdec_get_int(blob, addr, in altera_tse_probe()
642 if (priv->dma_type == ALT_SGDMA) { in altera_tse_probe()
647 return -ENOMEM; in altera_tse_probe()
650 priv->tx_desc = desc_mem; in altera_tse_probe()
651 priv->rx_desc = priv->tx_desc + in altera_tse_probe()
655 priv->rx_buf = malloc_cache_aligned(PKTSIZE_ALIGN); in altera_tse_probe()
656 if (!priv->rx_buf) in altera_tse_probe()
657 return -ENOMEM; in altera_tse_probe()
664 priv->interface = pdata->phy_interface; in altera_tse_probe()
665 tse_mdio_init(dev->name, priv); in altera_tse_probe()
666 priv->bus = miiphy_get_dev_by_name(dev->name); in altera_tse_probe()
678 pdata->phy_interface = -1; in altera_tse_ofdata_to_platdata()
679 phy_mode = fdt_getprop(gd->fdt_blob, dev_of_offset(dev), "phy-mode", in altera_tse_ofdata_to_platdata()
682 pdata->phy_interface = phy_get_interface_by_name(phy_mode); in altera_tse_ofdata_to_platdata()
683 if (pdata->phy_interface == -1) { in altera_tse_ofdata_to_platdata()
685 return -EINVAL; in altera_tse_ofdata_to_platdata()
701 { .compatible = "altr,tse-msgdma-1.0", .data = ALT_MSGDMA },
702 { .compatible = "altr,tse-1.0", .data = ALT_SGDMA },