Lines Matching +full:nand +full:- +full:ecc +full:- +full:maximize
3 * This is the generic MTD driver for NAND flash devices. It should be
4 * capable of working with almost all NAND chips currently available.
7 * http://www.linux-mtd.infradead.org/doc/nand.html
10 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
20 * Check, if mtd->ecctype should be set to MTD_ECC_HW
21 * if we have HW ECC support.
113 if (ofs & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
115 ret = -EINVAL; in check_offs_len()
119 if (len & ((1ULL << chip->phys_erase_shift) - 1)) { in check_offs_len()
121 ret = -EINVAL; in check_offs_len()
128 * nand_release_device - [GENERIC] release chip
137 /* De-select the NAND device */ in nand_release_device()
138 chip->select_chip(mtd, -1); in nand_release_device()
142 * nand_read_byte - [DEFAULT] read one byte from the chip
150 return readb(chip->IO_ADDR_R); in nand_read_byte()
154 * nand_read_byte16 - [DEFAULT] read one byte endianness aware from the chip
163 return (uint8_t) cpu_to_le16(readw(chip->IO_ADDR_R)); in nand_read_byte16()
167 * nand_read_word - [DEFAULT] read one word from the chip
175 return readw(chip->IO_ADDR_R); in nand_read_word()
179 * nand_select_chip - [DEFAULT] control CE line
181 * @chipnr: chipnumber to select, -1 for deselect
190 case -1: in nand_select_chip()
191 chip->cmd_ctrl(mtd, NAND_CMD_NONE, 0 | NAND_CTRL_CHANGE); in nand_select_chip()
202 * nand_write_byte - [DEFAULT] write single byte to chip
212 chip->write_buf(mtd, &byte, 1); in nand_write_byte()
216 * nand_write_byte16 - [DEFAULT] write single byte to a chip with width 16
220 * Default function to write a byte to I/O[7:0] on a 16-bit wide chip.
229 * a byte. The ONFi spec (Revision 3.1; 2012-09-19, Section 2.16) reads: in nand_write_byte16()
231 * When the host supports a 16-bit bus width, only data is in nand_write_byte16()
232 * transferred at the 16-bit width. All address and command line in nand_write_byte16()
233 * transfers shall use only the lower 8-bits of the data bus. During in nand_write_byte16()
235 * 8-bits of the data bus. During address transfers, the host shall in nand_write_byte16()
236 * set the upper 8-bits of the data bus to 00h. in nand_write_byte16()
243 chip->write_buf(mtd, (uint8_t *)&word, 2); in nand_write_byte16()
280 * nand_write_buf - [DEFAULT] write buffer to chip
291 iowrite8_rep(chip->IO_ADDR_W, buf, len); in nand_write_buf()
295 * nand_read_buf - [DEFAULT] read chip data into buffer
306 ioread8_rep(chip->IO_ADDR_R, buf, len); in nand_read_buf()
310 * nand_write_buf16 - [DEFAULT] write buffer to chip
322 iowrite16_rep(chip->IO_ADDR_W, p, len >> 1); in nand_write_buf16()
326 * nand_read_buf16 - [DEFAULT] read chip data into buffer
338 ioread16_rep(chip->IO_ADDR_R, p, len >> 1); in nand_read_buf16()
342 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
354 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) in nand_block_bad()
355 ofs += mtd->erasesize - mtd->writesize; in nand_block_bad()
357 page = (int)(ofs >> chip->page_shift) & chip->pagemask; in nand_block_bad()
360 if (chip->options & NAND_BUSWIDTH_16) { in nand_block_bad()
361 chip->cmdfunc(mtd, NAND_CMD_READOOB, in nand_block_bad()
362 chip->badblockpos & 0xFE, page); in nand_block_bad()
363 bad = cpu_to_le16(chip->read_word(mtd)); in nand_block_bad()
364 if (chip->badblockpos & 0x1) in nand_block_bad()
369 chip->cmdfunc(mtd, NAND_CMD_READOOB, chip->badblockpos, in nand_block_bad()
371 bad = chip->read_byte(mtd); in nand_block_bad()
374 if (likely(chip->badblockbits == 8)) in nand_block_bad()
377 res = hweight8(bad) < chip->badblockbits; in nand_block_bad()
378 ofs += mtd->writesize; in nand_block_bad()
379 page = (int)(ofs >> chip->page_shift) & chip->pagemask; in nand_block_bad()
381 } while (!res && i < 2 && (chip->bbt_options & NAND_BBT_SCAN2NDPAGE)); in nand_block_bad()
387 * nand_default_block_markbad - [DEFAULT] mark a block bad via bad block marker
404 ops.ooboffs = chip->badblockpos; in nand_default_block_markbad()
405 if (chip->options & NAND_BUSWIDTH_16) { in nand_default_block_markbad()
414 if (chip->bbt_options & NAND_BBT_SCANLASTPAGE) in nand_default_block_markbad()
415 ofs += mtd->erasesize - mtd->writesize; in nand_default_block_markbad()
422 ofs += mtd->writesize; in nand_default_block_markbad()
423 } while ((chip->bbt_options & NAND_BBT_SCAN2NDPAGE) && i < 2); in nand_default_block_markbad()
429 * nand_block_markbad_lowlevel - mark a block bad
433 * This function performs the generic NAND bad block marking steps (i.e., bad
435 * specify how to write bad block markers to OOB (chip->block_markbad).
450 if (!(chip->bbt_options & NAND_BBT_NO_OOB_BBM)) { in nand_block_markbad_lowlevel()
457 einfo.len = 1ULL << chip->phys_erase_shift; in nand_block_markbad_lowlevel()
462 ret = chip->block_markbad(mtd, ofs); in nand_block_markbad_lowlevel()
467 if (chip->bbt) { in nand_block_markbad_lowlevel()
474 mtd->ecc_stats.badblocks++; in nand_block_markbad_lowlevel()
480 * nand_check_wp - [GENERIC] check if the chip is write protected
491 if (chip->options & NAND_BROKEN_XD) in nand_check_wp()
495 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); in nand_check_wp()
496 return (chip->read_byte(mtd) & NAND_STATUS_WP) ? 0 : 1; in nand_check_wp()
500 * nand_block_isreserved - [GENERIC] Check if a block is marked reserved.
510 if (!chip->bbt) in nand_block_isreserved()
517 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
529 if (!(chip->options & NAND_SKIP_BBTSCAN) && in nand_block_checkbad()
530 !(chip->options & NAND_BBT_SCANNED)) { in nand_block_checkbad()
531 chip->options |= NAND_BBT_SCANNED; in nand_block_checkbad()
532 chip->scan_bbt(mtd); in nand_block_checkbad()
535 if (!chip->bbt) in nand_block_checkbad()
536 return chip->block_bad(mtd, ofs); in nand_block_checkbad()
543 * nand_wait_ready - [GENERIC] Wait for the ready pin after commands.
557 if (chip->dev_ready) in nand_wait_ready()
558 if (chip->dev_ready(mtd)) in nand_wait_ready()
562 if (!chip->dev_ready(mtd)) in nand_wait_ready()
568 * nand_wait_status_ready - [GENERIC] Wait for the ready status after commands.
582 if ((chip->read_byte(mtd) & NAND_STATUS_READY)) in nand_wait_status_ready()
589 * nand_command - [DEFAULT] Send command to NAND device
592 * @column: the column address for this command, -1 if none
593 * @page_addr: the page address for this command, -1 if none
595 * Send command to NAND device. This function is used for small page devices
608 if (column >= mtd->writesize) { in nand_command()
610 column -= mtd->writesize; in nand_command()
613 /* First 256 bytes --> READ0 */ in nand_command()
616 column -= 256; in nand_command()
619 chip->cmd_ctrl(mtd, readcmd, ctrl); in nand_command()
622 chip->cmd_ctrl(mtd, command, ctrl); in nand_command()
627 if (column != -1) { in nand_command()
629 if (chip->options & NAND_BUSWIDTH_16 && in nand_command()
632 chip->cmd_ctrl(mtd, column, ctrl); in nand_command()
635 if (page_addr != -1) { in nand_command()
636 chip->cmd_ctrl(mtd, page_addr, ctrl); in nand_command()
638 chip->cmd_ctrl(mtd, page_addr >> 8, ctrl); in nand_command()
639 if (chip->options & NAND_ROW_ADDR_3) in nand_command()
640 chip->cmd_ctrl(mtd, page_addr >> 16, ctrl); in nand_command()
642 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); in nand_command()
660 if (chip->dev_ready) in nand_command()
662 udelay(chip->chip_delay); in nand_command()
663 chip->cmd_ctrl(mtd, NAND_CMD_STATUS, in nand_command()
665 chip->cmd_ctrl(mtd, in nand_command()
667 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ in nand_command()
677 if (!chip->dev_ready) { in nand_command()
678 udelay(chip->chip_delay); in nand_command()
692 * nand_command_lp - [DEFAULT] Send command to NAND large page device
695 * @column: the column address for this command, -1 if none
696 * @page_addr: the page address for this command, -1 if none
698 * Send command to NAND device. This is the version for the new large page
709 column += mtd->writesize; in nand_command_lp()
714 chip->cmd_ctrl(mtd, command, NAND_NCE | NAND_CLE | NAND_CTRL_CHANGE); in nand_command_lp()
716 if (column != -1 || page_addr != -1) { in nand_command_lp()
720 if (column != -1) { in nand_command_lp()
722 if (chip->options & NAND_BUSWIDTH_16 && in nand_command_lp()
725 chip->cmd_ctrl(mtd, column, ctrl); in nand_command_lp()
727 chip->cmd_ctrl(mtd, column >> 8, ctrl); in nand_command_lp()
729 if (page_addr != -1) { in nand_command_lp()
730 chip->cmd_ctrl(mtd, page_addr, ctrl); in nand_command_lp()
731 chip->cmd_ctrl(mtd, page_addr >> 8, in nand_command_lp()
733 if (chip->options & NAND_ROW_ADDR_3) in nand_command_lp()
734 chip->cmd_ctrl(mtd, page_addr >> 16, in nand_command_lp()
738 chip->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE); in nand_command_lp()
758 if (chip->dev_ready) in nand_command_lp()
760 udelay(chip->chip_delay); in nand_command_lp()
761 chip->cmd_ctrl(mtd, NAND_CMD_STATUS, in nand_command_lp()
763 chip->cmd_ctrl(mtd, NAND_CMD_NONE, in nand_command_lp()
765 /* EZ-NAND can take upto 250ms as per ONFi v4.0 */ in nand_command_lp()
771 chip->cmd_ctrl(mtd, NAND_CMD_RNDOUTSTART, in nand_command_lp()
773 chip->cmd_ctrl(mtd, NAND_CMD_NONE, in nand_command_lp()
778 chip->cmd_ctrl(mtd, NAND_CMD_READSTART, in nand_command_lp()
780 chip->cmd_ctrl(mtd, NAND_CMD_NONE, in nand_command_lp()
789 if (!chip->dev_ready) { in nand_command_lp()
790 udelay(chip->chip_delay); in nand_command_lp()
805 * panic_nand_get_device - [GENERIC] Get chip for selected access
806 * @chip: the nand chip descriptor
816 chip->controller->active = chip; in panic_nand_get_device()
817 chip->state = new_state; in panic_nand_get_device()
821 * nand_get_device - [GENERIC] Get chip for selected access
831 chip->state = new_state; in nand_get_device()
836 * panic_nand_wait - [GENERIC] wait until the command is done
838 * @chip: NAND chip structure
850 if (chip->dev_ready) { in panic_nand_wait()
851 if (chip->dev_ready(mtd)) in panic_nand_wait()
854 if (chip->read_byte(mtd) & NAND_STATUS_READY) in panic_nand_wait()
862 * nand_wait - [DEFAULT] wait until the command is done
864 * @chip: NAND chip structure
881 chip->cmdfunc(mtd, NAND_CMD_STATUS, -1, -1); in nand_wait()
888 if (chip->dev_ready) { in nand_wait()
889 if (chip->dev_ready(mtd)) in nand_wait()
892 if (chip->read_byte(mtd) & NAND_STATUS_READY) in nand_wait()
898 status = (int)chip->read_byte(mtd); in nand_wait()
905 * nand_reset_data_interface - Reset data interface and timings
906 * @chip: The NAND chip
919 if (!chip->setup_data_interface) in nand_reset_data_interface()
925 * To transition from NV-DDR or NV-DDR2 to the SDR data in nand_reset_data_interface()
937 ret = chip->setup_data_interface(mtd, chipnr, conf); in nand_reset_data_interface()
945 * nand_setup_data_interface - Setup the best data interface and timings
946 * @chip: The NAND chip
949 * Find and configure the best data interface and NAND timings supported by
952 * and if the NAND chip does not support ONFI, relies on the
953 * ->onfi_timing_mode_default specified in the nand_ids table.
962 if (!chip->setup_data_interface || !chip->data_interface) in nand_setup_data_interface()
969 if (chip->onfi_version) { in nand_setup_data_interface()
971 chip->onfi_timing_mode_default, in nand_setup_data_interface()
974 ret = chip->onfi_set_features(mtd, chip, in nand_setup_data_interface()
981 ret = chip->setup_data_interface(mtd, chipnr, chip->data_interface); in nand_setup_data_interface()
987 * nand_init_data_interface - find the best data interface and timings
988 * @chip: The NAND chip
990 * Find the best data interface and NAND timings supported by the chip
993 * and if the NAND chip does not support ONFI, relies on the
994 * ->onfi_timing_mode_default specified in the nand_ids table. After this
995 * function nand_chip->data_interface is initialized with the best timing mode
1005 if (!chip->setup_data_interface) in nand_init_data_interface()
1010 * if the NAND does not support ONFI, fallback to the default ONFI in nand_init_data_interface()
1015 if (!chip->onfi_timing_mode_default) in nand_init_data_interface()
1018 modes = GENMASK(chip->onfi_timing_mode_default, 0); in nand_init_data_interface()
1021 chip->data_interface = kzalloc(sizeof(*chip->data_interface), in nand_init_data_interface()
1023 if (!chip->data_interface) in nand_init_data_interface()
1024 return -ENOMEM; in nand_init_data_interface()
1026 for (mode = fls(modes) - 1; mode >= 0; mode--) { in nand_init_data_interface()
1027 ret = onfi_init_data_interface(chip, chip->data_interface, in nand_init_data_interface()
1032 /* Pass -1 to only */ in nand_init_data_interface()
1033 ret = chip->setup_data_interface(mtd, in nand_init_data_interface()
1035 chip->data_interface); in nand_init_data_interface()
1037 chip->onfi_timing_mode_default = mode; in nand_init_data_interface()
1047 kfree(chip->data_interface); in nand_release_data_interface()
1051 * nand_reset - Reset and initialize a NAND device
1052 * @chip: The NAND chip
1067 * The CS line has to be released before we can apply the new NAND in nand_reset()
1068 * interface settings, hence this weird ->select_chip() dance. in nand_reset()
1070 chip->select_chip(mtd, chipnr); in nand_reset()
1071 chip->cmdfunc(mtd, NAND_CMD_RESET, -1, -1); in nand_reset()
1072 chip->select_chip(mtd, -1); in nand_reset()
1074 chip->select_chip(mtd, chipnr); in nand_reset()
1076 chip->select_chip(mtd, -1); in nand_reset()
1084 * nand_check_erased_buf - check if a buffer contains (almost) only 0xff data
1099 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
1109 len--, bitmap++) { in nand_check_erased_buf()
1111 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
1113 return -EBADMSG; in nand_check_erased_buf()
1116 for (; len >= 4; len -= 4, bitmap += 4) { in nand_check_erased_buf()
1118 bitflips += 32 - weight; in nand_check_erased_buf()
1120 return -EBADMSG; in nand_check_erased_buf()
1123 for (; len > 0; len--, bitmap++) { in nand_check_erased_buf()
1125 bitflips += BITS_PER_BYTE - weight; in nand_check_erased_buf()
1127 return -EBADMSG; in nand_check_erased_buf()
1134 * nand_check_erased_ecc_chunk - check if an ECC chunk contains (almost) only
1138 * @ecc: ECC buffer
1139 * @ecclen: ECC length
1144 * Check if a data buffer and its associated ECC and OOB data contains only
1151 * 1/ ECC algorithms are working on pre-defined block sizes which are usually
1152 * different from the NAND page size. When fixing bitflips, ECC engines will
1153 * report the number of errors per chunk, and the NAND core infrastructure
1159 * the payload data but also their associated ECC data, because a user might
1161 * shouldn't consider the chunk as erased, and checking ECC bytes prevent
1164 * data are protected by the ECC engine.
1166 * extra OOB data to an ECC chunk.
1169 * bitflips_threshold, or -ERROR_CODE for bitflips in excess of the
1173 void *ecc, int ecclen, in nand_check_erased_ecc_chunk() argument
1184 bitflips_threshold -= data_bitflips; in nand_check_erased_ecc_chunk()
1186 ecc_bitflips = nand_check_erased_buf(ecc, ecclen, bitflips_threshold); in nand_check_erased_ecc_chunk()
1190 bitflips_threshold -= ecc_bitflips; in nand_check_erased_ecc_chunk()
1201 memset(ecc, 0xff, ecclen); in nand_check_erased_ecc_chunk()
1211 * nand_read_page_raw - [INTERN] read raw page data without ecc
1213 * @chip: nand chip info structure
1215 * @oob_required: caller requires OOB data read to chip->oob_poi
1218 * Not for syndrome calculating ECC controllers, which use a special oob layout.
1223 chip->read_buf(mtd, buf, mtd->writesize); in nand_read_page_raw()
1225 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_page_raw()
1230 * nand_read_page_raw_syndrome - [INTERN] read raw page data without ecc
1232 * @chip: nand chip info structure
1234 * @oob_required: caller requires OOB data read to chip->oob_poi
1243 int eccsize = chip->ecc.size; in nand_read_page_raw_syndrome()
1244 int eccbytes = chip->ecc.bytes; in nand_read_page_raw_syndrome()
1245 uint8_t *oob = chip->oob_poi; in nand_read_page_raw_syndrome()
1248 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_read_page_raw_syndrome()
1249 chip->read_buf(mtd, buf, eccsize); in nand_read_page_raw_syndrome()
1252 if (chip->ecc.prepad) { in nand_read_page_raw_syndrome()
1253 chip->read_buf(mtd, oob, chip->ecc.prepad); in nand_read_page_raw_syndrome()
1254 oob += chip->ecc.prepad; in nand_read_page_raw_syndrome()
1257 chip->read_buf(mtd, oob, eccbytes); in nand_read_page_raw_syndrome()
1260 if (chip->ecc.postpad) { in nand_read_page_raw_syndrome()
1261 chip->read_buf(mtd, oob, chip->ecc.postpad); in nand_read_page_raw_syndrome()
1262 oob += chip->ecc.postpad; in nand_read_page_raw_syndrome()
1266 size = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_raw_syndrome()
1268 chip->read_buf(mtd, oob, size); in nand_read_page_raw_syndrome()
1274 * nand_read_page_swecc - [REPLACEABLE] software ECC based page read function
1276 * @chip: nand chip info structure
1278 * @oob_required: caller requires OOB data read to chip->oob_poi
1284 int i, eccsize = chip->ecc.size; in nand_read_page_swecc()
1285 int eccbytes = chip->ecc.bytes; in nand_read_page_swecc()
1286 int eccsteps = chip->ecc.steps; in nand_read_page_swecc()
1288 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_swecc()
1289 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_swecc()
1290 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_swecc()
1293 chip->ecc.read_page_raw(mtd, chip, buf, 1, page); in nand_read_page_swecc()
1295 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_read_page_swecc()
1296 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page_swecc()
1298 for (i = 0; i < chip->ecc.total; i++) in nand_read_page_swecc()
1299 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_swecc()
1301 eccsteps = chip->ecc.steps; in nand_read_page_swecc()
1304 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_swecc()
1307 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_swecc()
1309 mtd->ecc_stats.failed++; in nand_read_page_swecc()
1311 mtd->ecc_stats.corrected += stat; in nand_read_page_swecc()
1319 * nand_read_subpage - [REPLACEABLE] ECC based sub-page read function
1321 * @chip: nand chip info structure
1332 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_subpage()
1336 int busw = (chip->options & NAND_BUSWIDTH_16) ? 2 : 1; in nand_read_subpage()
1340 /* Column address within the page aligned to ECC size (256bytes) */ in nand_read_subpage()
1341 start_step = data_offs / chip->ecc.size; in nand_read_subpage()
1342 end_step = (data_offs + readlen - 1) / chip->ecc.size; in nand_read_subpage()
1343 num_steps = end_step - start_step + 1; in nand_read_subpage()
1344 index = start_step * chip->ecc.bytes; in nand_read_subpage()
1346 /* Data size aligned to ECC ecc.size */ in nand_read_subpage()
1347 datafrag_len = num_steps * chip->ecc.size; in nand_read_subpage()
1348 eccfrag_len = num_steps * chip->ecc.bytes; in nand_read_subpage()
1350 data_col_addr = start_step * chip->ecc.size; in nand_read_subpage()
1353 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, data_col_addr, -1); in nand_read_subpage()
1356 chip->read_buf(mtd, p, datafrag_len); in nand_read_subpage()
1358 /* Calculate ECC */ in nand_read_subpage()
1359 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) in nand_read_subpage()
1360 chip->ecc.calculate(mtd, p, &chip->buffers->ecccalc[i]); in nand_read_subpage()
1364 * ecc.pos. Let's make sure that there are no gaps in ECC positions. in nand_read_subpage()
1366 for (i = 0; i < eccfrag_len - 1; i++) { in nand_read_subpage()
1373 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); in nand_read_subpage()
1374 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_subpage()
1377 * Send the command to read the particular ECC bytes take care in nand_read_subpage()
1380 aligned_pos = eccpos[index] & ~(busw - 1); in nand_read_subpage()
1382 if (eccpos[index] & (busw - 1)) in nand_read_subpage()
1384 if (eccpos[index + (num_steps * chip->ecc.bytes)] & (busw - 1)) in nand_read_subpage()
1387 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, in nand_read_subpage()
1388 mtd->writesize + aligned_pos, -1); in nand_read_subpage()
1389 chip->read_buf(mtd, &chip->oob_poi[aligned_pos], aligned_len); in nand_read_subpage()
1393 chip->buffers->ecccode[i] = chip->oob_poi[eccpos[i + index]]; in nand_read_subpage()
1396 for (i = 0; i < eccfrag_len ; i += chip->ecc.bytes, p += chip->ecc.size) { in nand_read_subpage()
1399 stat = chip->ecc.correct(mtd, p, in nand_read_subpage()
1400 &chip->buffers->ecccode[i], &chip->buffers->ecccalc[i]); in nand_read_subpage()
1401 if (stat == -EBADMSG && in nand_read_subpage()
1402 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_subpage()
1404 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_subpage()
1405 &chip->buffers->ecccode[i], in nand_read_subpage()
1406 chip->ecc.bytes, in nand_read_subpage()
1408 chip->ecc.strength); in nand_read_subpage()
1412 mtd->ecc_stats.failed++; in nand_read_subpage()
1414 mtd->ecc_stats.corrected += stat; in nand_read_subpage()
1422 * nand_read_page_hwecc - [REPLACEABLE] hardware ECC based page read function
1424 * @chip: nand chip info structure
1426 * @oob_required: caller requires OOB data read to chip->oob_poi
1429 * Not for syndrome calculating ECC controllers which need a special oob layout.
1434 int i, eccsize = chip->ecc.size; in nand_read_page_hwecc()
1435 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc()
1436 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
1438 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_hwecc()
1439 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_hwecc()
1440 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_hwecc()
1443 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
1444 chip->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page_hwecc()
1445 chip->read_buf(mtd, p, eccsize); in nand_read_page_hwecc()
1446 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page_hwecc()
1448 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_page_hwecc()
1450 for (i = 0; i < chip->ecc.total; i++) in nand_read_page_hwecc()
1451 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_hwecc()
1453 eccsteps = chip->ecc.steps; in nand_read_page_hwecc()
1456 for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc()
1459 stat = chip->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page_hwecc()
1460 if (stat == -EBADMSG && in nand_read_page_hwecc()
1461 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc()
1466 chip->ecc.strength); in nand_read_page_hwecc()
1470 mtd->ecc_stats.failed++; in nand_read_page_hwecc()
1472 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc()
1480 * nand_read_page_hwecc_oob_first - [REPLACEABLE] hw ecc, read oob first
1482 * @chip: nand chip info structure
1484 * @oob_required: caller requires OOB data read to chip->oob_poi
1487 * Hardware ECC for large page chips, require OOB to be read first. For this
1488 * ECC mode, the write_page method is re-used from ECC_HW. These methods
1489 * read/write ECC from the OOB area, unlike the ECC_HW_SYNDROME support with
1490 * multiple ECC steps, follows the "infix ECC" scheme and reads/writes ECC from
1491 * the data area, by overwriting the NAND manufacturer bad block markings.
1496 int i, eccsize = chip->ecc.size; in nand_read_page_hwecc_oob_first()
1497 int eccbytes = chip->ecc.bytes; in nand_read_page_hwecc_oob_first()
1498 int eccsteps = chip->ecc.steps; in nand_read_page_hwecc_oob_first()
1500 uint8_t *ecc_code = chip->buffers->ecccode; in nand_read_page_hwecc_oob_first()
1501 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_read_page_hwecc_oob_first()
1502 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_read_page_hwecc_oob_first()
1506 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); in nand_read_page_hwecc_oob_first()
1507 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_page_hwecc_oob_first()
1508 chip->cmdfunc(mtd, NAND_CMD_READ0, 0, page); in nand_read_page_hwecc_oob_first()
1510 for (i = 0; i < chip->ecc.total; i++) in nand_read_page_hwecc_oob_first()
1511 ecc_code[i] = chip->oob_poi[eccpos[i]]; in nand_read_page_hwecc_oob_first()
1513 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_hwecc_oob_first()
1516 chip->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page_hwecc_oob_first()
1517 chip->read_buf(mtd, p, eccsize); in nand_read_page_hwecc_oob_first()
1518 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page_hwecc_oob_first()
1520 stat = chip->ecc.correct(mtd, p, &ecc_code[i], NULL); in nand_read_page_hwecc_oob_first()
1521 if (stat == -EBADMSG && in nand_read_page_hwecc_oob_first()
1522 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_hwecc_oob_first()
1527 chip->ecc.strength); in nand_read_page_hwecc_oob_first()
1531 mtd->ecc_stats.failed++; in nand_read_page_hwecc_oob_first()
1533 mtd->ecc_stats.corrected += stat; in nand_read_page_hwecc_oob_first()
1541 * nand_read_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page read
1543 * @chip: nand chip info structure
1545 * @oob_required: caller requires OOB data read to chip->oob_poi
1554 int i, eccsize = chip->ecc.size; in nand_read_page_syndrome()
1555 int eccbytes = chip->ecc.bytes; in nand_read_page_syndrome()
1556 int eccsteps = chip->ecc.steps; in nand_read_page_syndrome()
1557 int eccpadbytes = eccbytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_page_syndrome()
1559 uint8_t *oob = chip->oob_poi; in nand_read_page_syndrome()
1562 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page_syndrome()
1565 chip->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page_syndrome()
1566 chip->read_buf(mtd, p, eccsize); in nand_read_page_syndrome()
1568 if (chip->ecc.prepad) { in nand_read_page_syndrome()
1569 chip->read_buf(mtd, oob, chip->ecc.prepad); in nand_read_page_syndrome()
1570 oob += chip->ecc.prepad; in nand_read_page_syndrome()
1573 chip->ecc.hwctl(mtd, NAND_ECC_READSYN); in nand_read_page_syndrome()
1574 chip->read_buf(mtd, oob, eccbytes); in nand_read_page_syndrome()
1575 stat = chip->ecc.correct(mtd, p, oob, NULL); in nand_read_page_syndrome()
1579 if (chip->ecc.postpad) { in nand_read_page_syndrome()
1580 chip->read_buf(mtd, oob, chip->ecc.postpad); in nand_read_page_syndrome()
1581 oob += chip->ecc.postpad; in nand_read_page_syndrome()
1584 if (stat == -EBADMSG && in nand_read_page_syndrome()
1585 (chip->ecc.options & NAND_ECC_GENERIC_ERASED_CHECK)) { in nand_read_page_syndrome()
1587 stat = nand_check_erased_ecc_chunk(p, chip->ecc.size, in nand_read_page_syndrome()
1588 oob - eccpadbytes, in nand_read_page_syndrome()
1591 chip->ecc.strength); in nand_read_page_syndrome()
1595 mtd->ecc_stats.failed++; in nand_read_page_syndrome()
1597 mtd->ecc_stats.corrected += stat; in nand_read_page_syndrome()
1603 i = mtd->oobsize - (oob - chip->oob_poi); in nand_read_page_syndrome()
1605 chip->read_buf(mtd, oob, i); in nand_read_page_syndrome()
1611 * nand_transfer_oob - [INTERN] Transfer oob to client buffer
1612 * @chip: nand chip structure
1620 switch (ops->mode) { in nand_transfer_oob()
1624 memcpy(oob, chip->oob_poi + ops->ooboffs, len); in nand_transfer_oob()
1628 struct nand_oobfree *free = chip->ecc.layout->oobfree; in nand_transfer_oob()
1629 uint32_t boffs = 0, roffs = ops->ooboffs; in nand_transfer_oob()
1632 for (; free->length && len; free++, len -= bytes) { in nand_transfer_oob()
1635 if (roffs >= free->length) { in nand_transfer_oob()
1636 roffs -= free->length; in nand_transfer_oob()
1639 boffs = free->offset + roffs; in nand_transfer_oob()
1641 (free->length - roffs)); in nand_transfer_oob()
1644 bytes = min_t(size_t, len, free->length); in nand_transfer_oob()
1645 boffs = free->offset; in nand_transfer_oob()
1647 memcpy(oob, chip->oob_poi + boffs, bytes); in nand_transfer_oob()
1659 * nand_setup_read_retry - [INTERN] Set the READ RETRY mode
1664 * when there are too many bitflips in a page (i.e., ECC error). After setting
1673 if (retry_mode >= chip->read_retries) in nand_setup_read_retry()
1674 return -EINVAL; in nand_setup_read_retry()
1676 if (!chip->setup_read_retry) in nand_setup_read_retry()
1677 return -EOPNOTSUPP; in nand_setup_read_retry()
1679 return chip->setup_read_retry(mtd, retry_mode); in nand_setup_read_retry()
1683 * nand_do_read_ops - [INTERN] Read data with ECC
1696 uint32_t readlen = ops->len; in nand_do_read_ops()
1697 uint32_t oobreadlen = ops->ooblen; in nand_do_read_ops()
1706 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_ops()
1707 chip->select_chip(mtd, chipnr); in nand_do_read_ops()
1709 realpage = (int)(from >> chip->page_shift); in nand_do_read_ops()
1710 page = realpage & chip->pagemask; in nand_do_read_ops()
1712 col = (int)(from & (mtd->writesize - 1)); in nand_do_read_ops()
1714 buf = ops->datbuf; in nand_do_read_ops()
1715 oob = ops->oobbuf; in nand_do_read_ops()
1719 unsigned int ecc_failures = mtd->ecc_stats.failed; in nand_do_read_ops()
1722 bytes = min(mtd->writesize - col, readlen); in nand_do_read_ops()
1723 aligned = (bytes == mtd->writesize); in nand_do_read_ops()
1727 else if (chip->options & NAND_USE_BOUNCE_BUFFER) in nand_do_read_ops()
1729 chip->buf_align); in nand_do_read_ops()
1734 if (realpage != chip->pagebuf || oob) { in nand_do_read_ops()
1735 bufpoi = use_bufpoi ? chip->buffers->databuf : buf; in nand_do_read_ops()
1742 if (nand_standard_page_accessors(&chip->ecc)) in nand_do_read_ops()
1743 chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); in nand_do_read_ops()
1747 * the read methods return max bitflips per ecc step. in nand_do_read_ops()
1749 if (unlikely(ops->mode == MTD_OPS_RAW)) in nand_do_read_ops()
1750 ret = chip->ecc.read_page_raw(mtd, chip, bufpoi, in nand_do_read_ops()
1755 ret = chip->ecc.read_subpage(mtd, chip, in nand_do_read_ops()
1759 ret = chip->ecc.read_page(mtd, chip, bufpoi, in nand_do_read_ops()
1764 chip->pagebuf = -1; in nand_do_read_ops()
1773 !(mtd->ecc_stats.failed - ecc_failures) && in nand_do_read_ops()
1774 (ops->mode != MTD_OPS_RAW)) { in nand_do_read_ops()
1775 chip->pagebuf = realpage; in nand_do_read_ops()
1776 chip->pagebuf_bitflips = ret; in nand_do_read_ops()
1779 chip->pagebuf = -1; in nand_do_read_ops()
1781 memcpy(buf, chip->buffers->databuf + col, bytes); in nand_do_read_ops()
1790 oobreadlen -= toread; in nand_do_read_ops()
1794 if (chip->options & NAND_NEED_READRDY) { in nand_do_read_ops()
1796 if (!chip->dev_ready) in nand_do_read_ops()
1797 udelay(chip->chip_delay); in nand_do_read_ops()
1802 if (mtd->ecc_stats.failed - ecc_failures) { in nand_do_read_ops()
1803 if (retry_mode + 1 < chip->read_retries) { in nand_do_read_ops()
1811 mtd->ecc_stats.failed = ecc_failures; in nand_do_read_ops()
1821 memcpy(buf, chip->buffers->databuf + col, bytes); in nand_do_read_ops()
1824 chip->pagebuf_bitflips); in nand_do_read_ops()
1827 readlen -= bytes; in nand_do_read_ops()
1845 page = realpage & chip->pagemask; in nand_do_read_ops()
1849 chip->select_chip(mtd, -1); in nand_do_read_ops()
1850 chip->select_chip(mtd, chipnr); in nand_do_read_ops()
1853 chip->select_chip(mtd, -1); in nand_do_read_ops()
1855 ops->retlen = ops->len - (size_t) readlen; in nand_do_read_ops()
1857 ops->oobretlen = ops->ooblen - oobreadlen; in nand_do_read_ops()
1863 return -EBADMSG; in nand_do_read_ops()
1869 * nand_read_oob_std - [REPLACEABLE] the most common OOB data read function
1871 * @chip: nand chip info structure
1877 chip->cmdfunc(mtd, NAND_CMD_READOOB, 0, page); in nand_read_oob_std()
1878 chip->read_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_read_oob_std()
1883 * nand_read_oob_syndrome - [REPLACEABLE] OOB data read function for HW ECC
1886 * @chip: nand chip info structure
1892 int length = mtd->oobsize; in nand_read_oob_syndrome()
1893 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_read_oob_syndrome()
1894 int eccsize = chip->ecc.size; in nand_read_oob_syndrome()
1895 uint8_t *bufpoi = chip->oob_poi; in nand_read_oob_syndrome()
1898 chip->cmdfunc(mtd, NAND_CMD_READ0, chip->ecc.size, page); in nand_read_oob_syndrome()
1899 for (i = 0; i < chip->ecc.steps; i++) { in nand_read_oob_syndrome()
1902 if (mtd->writesize > 512) in nand_read_oob_syndrome()
1903 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, pos, -1); in nand_read_oob_syndrome()
1905 chip->cmdfunc(mtd, NAND_CMD_READ0, pos, page); in nand_read_oob_syndrome()
1909 chip->read_buf(mtd, bufpoi, toread); in nand_read_oob_syndrome()
1911 length -= toread; in nand_read_oob_syndrome()
1914 chip->read_buf(mtd, bufpoi, length); in nand_read_oob_syndrome()
1920 * nand_write_oob_std - [REPLACEABLE] the most common OOB data write function
1922 * @chip: nand chip info structure
1929 const uint8_t *buf = chip->oob_poi; in nand_write_oob_std()
1930 int length = mtd->oobsize; in nand_write_oob_std()
1932 chip->cmdfunc(mtd, NAND_CMD_SEQIN, mtd->writesize, page); in nand_write_oob_std()
1933 chip->write_buf(mtd, buf, length); in nand_write_oob_std()
1935 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); in nand_write_oob_std()
1937 status = chip->waitfunc(mtd, chip); in nand_write_oob_std()
1939 return status & NAND_STATUS_FAIL ? -EIO : 0; in nand_write_oob_std()
1943 * nand_write_oob_syndrome - [REPLACEABLE] OOB data write function for HW ECC
1944 * with syndrome - only for large page flash
1946 * @chip: nand chip info structure
1952 int chunk = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad; in nand_write_oob_syndrome()
1953 int eccsize = chip->ecc.size, length = mtd->oobsize; in nand_write_oob_syndrome()
1954 int i, len, pos, status = 0, sndcmd = 0, steps = chip->ecc.steps; in nand_write_oob_syndrome()
1955 const uint8_t *bufpoi = chip->oob_poi; in nand_write_oob_syndrome()
1958 * data-ecc-data-ecc ... ecc-oob in nand_write_oob_syndrome()
1960 * data-pad-ecc-pad-data-pad .... ecc-pad-oob in nand_write_oob_syndrome()
1962 if (!chip->ecc.prepad && !chip->ecc.postpad) { in nand_write_oob_syndrome()
1968 chip->cmdfunc(mtd, NAND_CMD_SEQIN, pos, page); in nand_write_oob_syndrome()
1971 if (mtd->writesize <= 512) { in nand_write_oob_syndrome()
1977 chip->write_buf(mtd, (uint8_t *)&fill, in nand_write_oob_syndrome()
1979 len -= num; in nand_write_oob_syndrome()
1983 chip->cmdfunc(mtd, NAND_CMD_RNDIN, pos, -1); in nand_write_oob_syndrome()
1988 chip->write_buf(mtd, bufpoi, len); in nand_write_oob_syndrome()
1990 length -= len; in nand_write_oob_syndrome()
1993 chip->write_buf(mtd, bufpoi, length); in nand_write_oob_syndrome()
1995 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); in nand_write_oob_syndrome()
1996 status = chip->waitfunc(mtd, chip); in nand_write_oob_syndrome()
1998 return status & NAND_STATUS_FAIL ? -EIO : 0; in nand_write_oob_syndrome()
2002 * nand_do_read_oob - [INTERN] NAND read out-of-band
2007 * NAND read out-of-band data from the spare area.
2015 int readlen = ops->ooblen; in nand_do_read_oob()
2017 uint8_t *buf = ops->oobbuf; in nand_do_read_oob()
2023 stats = mtd->ecc_stats; in nand_do_read_oob()
2027 if (unlikely(ops->ooboffs >= len)) { in nand_do_read_oob()
2030 return -EINVAL; in nand_do_read_oob()
2034 if (unlikely(from >= mtd->size || in nand_do_read_oob()
2035 ops->ooboffs + readlen > ((mtd->size >> chip->page_shift) - in nand_do_read_oob()
2036 (from >> chip->page_shift)) * len)) { in nand_do_read_oob()
2039 return -EINVAL; in nand_do_read_oob()
2042 chipnr = (int)(from >> chip->chip_shift); in nand_do_read_oob()
2043 chip->select_chip(mtd, chipnr); in nand_do_read_oob()
2046 realpage = (int)(from >> chip->page_shift); in nand_do_read_oob()
2047 page = realpage & chip->pagemask; in nand_do_read_oob()
2052 if (ops->mode == MTD_OPS_RAW) in nand_do_read_oob()
2053 ret = chip->ecc.read_oob_raw(mtd, chip, page); in nand_do_read_oob()
2055 ret = chip->ecc.read_oob(mtd, chip, page); in nand_do_read_oob()
2063 if (chip->options & NAND_NEED_READRDY) { in nand_do_read_oob()
2065 if (!chip->dev_ready) in nand_do_read_oob()
2066 udelay(chip->chip_delay); in nand_do_read_oob()
2071 readlen -= len; in nand_do_read_oob()
2078 page = realpage & chip->pagemask; in nand_do_read_oob()
2082 chip->select_chip(mtd, -1); in nand_do_read_oob()
2083 chip->select_chip(mtd, chipnr); in nand_do_read_oob()
2086 chip->select_chip(mtd, -1); in nand_do_read_oob()
2088 ops->oobretlen = ops->ooblen - readlen; in nand_do_read_oob()
2093 if (mtd->ecc_stats.failed - stats.failed) in nand_do_read_oob()
2094 return -EBADMSG; in nand_do_read_oob()
2096 return mtd->ecc_stats.corrected - stats.corrected ? -EUCLEAN : 0; in nand_do_read_oob()
2100 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
2105 * NAND read data and/or out-of-band data.
2110 int ret = -ENOTSUPP; in nand_read_oob()
2112 ops->retlen = 0; in nand_read_oob()
2115 if (ops->datbuf && (from + ops->len) > mtd->size) { in nand_read_oob()
2118 return -EINVAL; in nand_read_oob()
2123 switch (ops->mode) { in nand_read_oob()
2133 if (!ops->datbuf) in nand_read_oob()
2145 * nand_write_page_raw - [INTERN] raw page write function
2147 * @chip: nand chip info structure
2149 * @oob_required: must write chip->oob_poi to OOB
2152 * Not for syndrome calculating ECC controllers, which use a special oob layout.
2157 chip->write_buf(mtd, buf, mtd->writesize); in nand_write_page_raw()
2159 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_write_page_raw()
2165 * nand_write_page_raw_syndrome - [INTERN] raw page write function
2167 * @chip: nand chip info structure
2169 * @oob_required: must write chip->oob_poi to OOB
2172 * We need a special oob layout and handling even when ECC isn't checked.
2179 int eccsize = chip->ecc.size; in nand_write_page_raw_syndrome()
2180 int eccbytes = chip->ecc.bytes; in nand_write_page_raw_syndrome()
2181 uint8_t *oob = chip->oob_poi; in nand_write_page_raw_syndrome()
2184 for (steps = chip->ecc.steps; steps > 0; steps--) { in nand_write_page_raw_syndrome()
2185 chip->write_buf(mtd, buf, eccsize); in nand_write_page_raw_syndrome()
2188 if (chip->ecc.prepad) { in nand_write_page_raw_syndrome()
2189 chip->write_buf(mtd, oob, chip->ecc.prepad); in nand_write_page_raw_syndrome()
2190 oob += chip->ecc.prepad; in nand_write_page_raw_syndrome()
2193 chip->write_buf(mtd, oob, eccbytes); in nand_write_page_raw_syndrome()
2196 if (chip->ecc.postpad) { in nand_write_page_raw_syndrome()
2197 chip->write_buf(mtd, oob, chip->ecc.postpad); in nand_write_page_raw_syndrome()
2198 oob += chip->ecc.postpad; in nand_write_page_raw_syndrome()
2202 size = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_raw_syndrome()
2204 chip->write_buf(mtd, oob, size); in nand_write_page_raw_syndrome()
2209 * nand_write_page_swecc - [REPLACEABLE] software ECC based page write function
2211 * @chip: nand chip info structure
2213 * @oob_required: must write chip->oob_poi to OOB
2220 int i, eccsize = chip->ecc.size; in nand_write_page_swecc()
2221 int eccbytes = chip->ecc.bytes; in nand_write_page_swecc()
2222 int eccsteps = chip->ecc.steps; in nand_write_page_swecc()
2223 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_write_page_swecc()
2225 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_write_page_swecc()
2227 /* Software ECC calculation */ in nand_write_page_swecc()
2228 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_write_page_swecc()
2229 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_write_page_swecc()
2231 for (i = 0; i < chip->ecc.total; i++) in nand_write_page_swecc()
2232 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in nand_write_page_swecc()
2234 return chip->ecc.write_page_raw(mtd, chip, buf, 1, page); in nand_write_page_swecc()
2238 * nand_write_page_hwecc - [REPLACEABLE] hardware ECC based page write function
2240 * @chip: nand chip info structure
2242 * @oob_required: must write chip->oob_poi to OOB
2249 int i, eccsize = chip->ecc.size; in nand_write_page_hwecc()
2250 int eccbytes = chip->ecc.bytes; in nand_write_page_hwecc()
2251 int eccsteps = chip->ecc.steps; in nand_write_page_hwecc()
2252 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_write_page_hwecc()
2254 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_write_page_hwecc()
2256 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_hwecc()
2257 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); in nand_write_page_hwecc()
2258 chip->write_buf(mtd, p, eccsize); in nand_write_page_hwecc()
2259 chip->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_write_page_hwecc()
2262 for (i = 0; i < chip->ecc.total; i++) in nand_write_page_hwecc()
2263 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in nand_write_page_hwecc()
2265 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_write_page_hwecc()
2272 * nand_write_subpage_hwecc - [REPLACEABLE] hardware ECC based subpage write
2274 * @chip: nand chip info structure
2278 * @oob_required: must write chip->oob_poi to OOB
2286 uint8_t *oob_buf = chip->oob_poi; in nand_write_subpage_hwecc()
2287 uint8_t *ecc_calc = chip->buffers->ecccalc; in nand_write_subpage_hwecc()
2288 int ecc_size = chip->ecc.size; in nand_write_subpage_hwecc()
2289 int ecc_bytes = chip->ecc.bytes; in nand_write_subpage_hwecc()
2290 int ecc_steps = chip->ecc.steps; in nand_write_subpage_hwecc()
2291 uint32_t *eccpos = chip->ecc.layout->eccpos; in nand_write_subpage_hwecc()
2293 uint32_t end_step = (offset + data_len - 1) / ecc_size; in nand_write_subpage_hwecc()
2294 int oob_bytes = mtd->oobsize / ecc_steps; in nand_write_subpage_hwecc()
2299 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); in nand_write_subpage_hwecc()
2302 chip->write_buf(mtd, buf, ecc_size); in nand_write_subpage_hwecc()
2304 /* mask ECC of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
2308 chip->ecc.calculate(mtd, buf, ecc_calc); in nand_write_subpage_hwecc()
2310 /* mask OOB of un-touched subpages by padding 0xFF */ in nand_write_subpage_hwecc()
2320 /* copy calculated ECC for whole page to chip->buffer->oob */ in nand_write_subpage_hwecc()
2321 /* this include masked-value(0xFF) for unwritten subpages */ in nand_write_subpage_hwecc()
2322 ecc_calc = chip->buffers->ecccalc; in nand_write_subpage_hwecc()
2323 for (i = 0; i < chip->ecc.total; i++) in nand_write_subpage_hwecc()
2324 chip->oob_poi[eccpos[i]] = ecc_calc[i]; in nand_write_subpage_hwecc()
2326 /* write OOB buffer to NAND device */ in nand_write_subpage_hwecc()
2327 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); in nand_write_subpage_hwecc()
2334 * nand_write_page_syndrome - [REPLACEABLE] hardware ECC syndrome based page write
2336 * @chip: nand chip info structure
2338 * @oob_required: must write chip->oob_poi to OOB
2349 int i, eccsize = chip->ecc.size; in nand_write_page_syndrome()
2350 int eccbytes = chip->ecc.bytes; in nand_write_page_syndrome()
2351 int eccsteps = chip->ecc.steps; in nand_write_page_syndrome()
2353 uint8_t *oob = chip->oob_poi; in nand_write_page_syndrome()
2355 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_write_page_syndrome()
2357 chip->ecc.hwctl(mtd, NAND_ECC_WRITE); in nand_write_page_syndrome()
2358 chip->write_buf(mtd, p, eccsize); in nand_write_page_syndrome()
2360 if (chip->ecc.prepad) { in nand_write_page_syndrome()
2361 chip->write_buf(mtd, oob, chip->ecc.prepad); in nand_write_page_syndrome()
2362 oob += chip->ecc.prepad; in nand_write_page_syndrome()
2365 chip->ecc.calculate(mtd, p, oob); in nand_write_page_syndrome()
2366 chip->write_buf(mtd, oob, eccbytes); in nand_write_page_syndrome()
2369 if (chip->ecc.postpad) { in nand_write_page_syndrome()
2370 chip->write_buf(mtd, oob, chip->ecc.postpad); in nand_write_page_syndrome()
2371 oob += chip->ecc.postpad; in nand_write_page_syndrome()
2376 i = mtd->oobsize - (oob - chip->oob_poi); in nand_write_page_syndrome()
2378 chip->write_buf(mtd, oob, i); in nand_write_page_syndrome()
2384 * nand_write_page - [REPLACEABLE] write one page
2386 * @chip: NAND chip descriptor
2390 * @oob_required: must write chip->oob_poi to OOB
2400 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && in nand_write_page()
2401 chip->ecc.write_subpage) in nand_write_page()
2402 subpage = offset || (data_len < mtd->writesize); in nand_write_page()
2406 if (nand_standard_page_accessors(&chip->ecc)) in nand_write_page()
2407 chip->cmdfunc(mtd, NAND_CMD_SEQIN, 0x00, page); in nand_write_page()
2410 status = chip->ecc.write_page_raw(mtd, chip, buf, in nand_write_page()
2413 status = chip->ecc.write_subpage(mtd, chip, offset, data_len, in nand_write_page()
2416 status = chip->ecc.write_page(mtd, chip, buf, oob_required, in nand_write_page()
2422 if (nand_standard_page_accessors(&chip->ecc)) { in nand_write_page()
2423 chip->cmdfunc(mtd, NAND_CMD_PAGEPROG, -1, -1); in nand_write_page()
2425 status = chip->waitfunc(mtd, chip); in nand_write_page()
2427 return -EIO; in nand_write_page()
2434 * nand_fill_oob - [INTERN] Transfer client buffer to oob
2449 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_fill_oob()
2451 switch (ops->mode) { in nand_fill_oob()
2455 memcpy(chip->oob_poi + ops->ooboffs, oob, len); in nand_fill_oob()
2459 struct nand_oobfree *free = chip->ecc.layout->oobfree; in nand_fill_oob()
2460 uint32_t boffs = 0, woffs = ops->ooboffs; in nand_fill_oob()
2463 for (; free->length && len; free++, len -= bytes) { in nand_fill_oob()
2466 if (woffs >= free->length) { in nand_fill_oob()
2467 woffs -= free->length; in nand_fill_oob()
2470 boffs = free->offset + woffs; in nand_fill_oob()
2472 (free->length - woffs)); in nand_fill_oob()
2475 bytes = min_t(size_t, len, free->length); in nand_fill_oob()
2476 boffs = free->offset; in nand_fill_oob()
2478 memcpy(chip->oob_poi + boffs, oob, bytes); in nand_fill_oob()
2489 #define NOTALIGNED(x) ((x & (chip->subpagesize - 1)) != 0)
2492 * nand_do_write_ops - [INTERN] NAND write with ECC
2497 * NAND write with ECC.
2504 uint32_t writelen = ops->len; in nand_do_write_ops()
2506 uint32_t oobwritelen = ops->ooblen; in nand_do_write_ops()
2509 uint8_t *oob = ops->oobbuf; in nand_do_write_ops()
2510 uint8_t *buf = ops->datbuf; in nand_do_write_ops()
2514 ops->retlen = 0; in nand_do_write_ops()
2522 return -EINVAL; in nand_do_write_ops()
2525 column = to & (mtd->writesize - 1); in nand_do_write_ops()
2527 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_ops()
2528 chip->select_chip(mtd, chipnr); in nand_do_write_ops()
2532 ret = -EIO; in nand_do_write_ops()
2536 realpage = (int)(to >> chip->page_shift); in nand_do_write_ops()
2537 page = realpage & chip->pagemask; in nand_do_write_ops()
2540 if (to <= ((loff_t)chip->pagebuf << chip->page_shift) && in nand_do_write_ops()
2541 ((loff_t)chip->pagebuf << chip->page_shift) < (to + ops->len)) in nand_do_write_ops()
2542 chip->pagebuf = -1; in nand_do_write_ops()
2545 if (oob && ops->ooboffs && (ops->ooboffs + ops->ooblen > oobmaxlen)) { in nand_do_write_ops()
2546 ret = -EINVAL; in nand_do_write_ops()
2551 int bytes = mtd->writesize; in nand_do_write_ops()
2554 int part_pagewr = (column || writelen < mtd->writesize); in nand_do_write_ops()
2558 else if (chip->options & NAND_USE_BOUNCE_BUFFER) in nand_do_write_ops()
2560 chip->buf_align); in nand_do_write_ops()
2570 bytes = min_t(int, bytes - column, writelen); in nand_do_write_ops()
2571 chip->pagebuf = -1; in nand_do_write_ops()
2572 memset(chip->buffers->databuf, 0xff, mtd->writesize); in nand_do_write_ops()
2573 memcpy(&chip->buffers->databuf[column], buf, bytes); in nand_do_write_ops()
2574 wbuf = chip->buffers->databuf; in nand_do_write_ops()
2580 oobwritelen -= len; in nand_do_write_ops()
2583 memset(chip->oob_poi, 0xff, mtd->oobsize); in nand_do_write_ops()
2585 ret = chip->write_page(mtd, chip, column, bytes, wbuf, in nand_do_write_ops()
2587 (ops->mode == MTD_OPS_RAW)); in nand_do_write_ops()
2591 writelen -= bytes; in nand_do_write_ops()
2599 page = realpage & chip->pagemask; in nand_do_write_ops()
2603 chip->select_chip(mtd, -1); in nand_do_write_ops()
2604 chip->select_chip(mtd, chipnr); in nand_do_write_ops()
2608 ops->retlen = ops->len - writelen; in nand_do_write_ops()
2610 ops->oobretlen = ops->ooblen; in nand_do_write_ops()
2613 chip->select_chip(mtd, -1); in nand_do_write_ops()
2618 * panic_nand_write - [MTD Interface] NAND write with ECC
2625 * NAND write with ECC. Used when performing writes in interrupt context, this
2653 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
2658 * NAND write out-of-band.
2667 __func__, (unsigned int)to, (int)ops->ooblen); in nand_do_write_oob()
2672 if ((ops->ooboffs + ops->ooblen) > len) { in nand_do_write_oob()
2675 return -EINVAL; in nand_do_write_oob()
2678 if (unlikely(ops->ooboffs >= len)) { in nand_do_write_oob()
2681 return -EINVAL; in nand_do_write_oob()
2685 if (unlikely(to >= mtd->size || in nand_do_write_oob()
2686 ops->ooboffs + ops->ooblen > in nand_do_write_oob()
2687 ((mtd->size >> chip->page_shift) - in nand_do_write_oob()
2688 (to >> chip->page_shift)) * len)) { in nand_do_write_oob()
2691 return -EINVAL; in nand_do_write_oob()
2694 chipnr = (int)(to >> chip->chip_shift); in nand_do_write_oob()
2704 chip->select_chip(mtd, chipnr); in nand_do_write_oob()
2707 page = (int)(to >> chip->page_shift); in nand_do_write_oob()
2711 chip->select_chip(mtd, -1); in nand_do_write_oob()
2712 return -EROFS; in nand_do_write_oob()
2716 if (page == chip->pagebuf) in nand_do_write_oob()
2717 chip->pagebuf = -1; in nand_do_write_oob()
2719 nand_fill_oob(mtd, ops->oobbuf, ops->ooblen, ops); in nand_do_write_oob()
2721 if (ops->mode == MTD_OPS_RAW) in nand_do_write_oob()
2722 status = chip->ecc.write_oob_raw(mtd, chip, page & chip->pagemask); in nand_do_write_oob()
2724 status = chip->ecc.write_oob(mtd, chip, page & chip->pagemask); in nand_do_write_oob()
2726 chip->select_chip(mtd, -1); in nand_do_write_oob()
2731 ops->oobretlen = ops->ooblen; in nand_do_write_oob()
2737 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
2745 int ret = -ENOTSUPP; in nand_write_oob()
2747 ops->retlen = 0; in nand_write_oob()
2750 if (ops->datbuf && (to + ops->len) > mtd->size) { in nand_write_oob()
2753 return -EINVAL; in nand_write_oob()
2758 switch (ops->mode) { in nand_write_oob()
2768 if (!ops->datbuf) in nand_write_oob()
2779 * single_erase - [GENERIC] NAND standard block erase command function
2783 * Standard erase command for NAND chips. Returns NAND status.
2789 chip->cmdfunc(mtd, NAND_CMD_ERASE1, -1, page); in single_erase()
2790 chip->cmdfunc(mtd, NAND_CMD_ERASE2, -1, -1); in single_erase()
2792 return chip->waitfunc(mtd, chip); in single_erase()
2796 * nand_erase - [MTD Interface] erase block(s)
2808 * nand_erase_nand - [INTERN] erase block(s)
2823 __func__, (unsigned long long)instr->addr, in nand_erase_nand()
2824 (unsigned long long)instr->len); in nand_erase_nand()
2826 if (check_offs_len(mtd, instr->addr, instr->len)) in nand_erase_nand()
2827 return -EINVAL; in nand_erase_nand()
2833 page = (int)(instr->addr >> chip->page_shift); in nand_erase_nand()
2834 chipnr = (int)(instr->addr >> chip->chip_shift); in nand_erase_nand()
2837 pages_per_block = 1 << (chip->phys_erase_shift - chip->page_shift); in nand_erase_nand()
2839 /* Select the NAND device */ in nand_erase_nand()
2840 chip->select_chip(mtd, chipnr); in nand_erase_nand()
2846 instr->state = MTD_ERASE_FAILED; in nand_erase_nand()
2851 len = instr->len; in nand_erase_nand()
2853 instr->state = MTD_ERASING; in nand_erase_nand()
2859 if (!instr->scrub && nand_block_checkbad(mtd, ((loff_t) page) << in nand_erase_nand()
2860 chip->page_shift, allowbbt)) { in nand_erase_nand()
2863 instr->state = MTD_ERASE_FAILED; in nand_erase_nand()
2871 if (page <= chip->pagebuf && chip->pagebuf < in nand_erase_nand()
2873 chip->pagebuf = -1; in nand_erase_nand()
2875 status = chip->erase(mtd, page & chip->pagemask); in nand_erase_nand()
2881 instr->state = MTD_ERASE_FAILED; in nand_erase_nand()
2882 instr->fail_addr = in nand_erase_nand()
2883 ((loff_t)page << chip->page_shift); in nand_erase_nand()
2888 len -= (1ULL << chip->phys_erase_shift); in nand_erase_nand()
2892 if (len && !(page & chip->pagemask)) { in nand_erase_nand()
2894 chip->select_chip(mtd, -1); in nand_erase_nand()
2895 chip->select_chip(mtd, chipnr); in nand_erase_nand()
2898 instr->state = MTD_ERASE_DONE; in nand_erase_nand()
2902 ret = instr->state == MTD_ERASE_DONE ? 0 : -EIO; in nand_erase_nand()
2905 chip->select_chip(mtd, -1); in nand_erase_nand()
2917 * nand_sync - [MTD Interface] sync
2933 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2940 int chipnr = (int)(offs >> chip->chip_shift); in nand_block_isbad()
2943 /* Select the NAND device */ in nand_block_isbad()
2945 chip->select_chip(mtd, chipnr); in nand_block_isbad()
2949 chip->select_chip(mtd, -1); in nand_block_isbad()
2956 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2976 * nand_onfi_set_features- [REPLACEABLE] set features for ONFI nand
2978 * @chip: nand chip info structure
2989 if (!chip->onfi_version || in nand_onfi_set_features()
2990 !(le16_to_cpu(chip->onfi_params.opt_cmd) in nand_onfi_set_features()
2992 return -ENOTSUPP; in nand_onfi_set_features()
2995 chip->cmdfunc(mtd, NAND_CMD_SET_FEATURES, addr, -1); in nand_onfi_set_features()
2997 chip->write_byte(mtd, subfeature_param[i]); in nand_onfi_set_features()
2999 status = chip->waitfunc(mtd, chip); in nand_onfi_set_features()
3001 return -EIO; in nand_onfi_set_features()
3006 * nand_onfi_get_features- [REPLACEABLE] get features for ONFI nand
3008 * @chip: nand chip info structure
3018 if (!chip->onfi_version || in nand_onfi_get_features()
3019 !(le16_to_cpu(chip->onfi_params.opt_cmd) in nand_onfi_get_features()
3021 return -ENOTSUPP; in nand_onfi_get_features()
3024 chip->cmdfunc(mtd, NAND_CMD_GET_FEATURES, addr, -1); in nand_onfi_get_features()
3026 *subfeature_param++ = chip->read_byte(mtd); in nand_onfi_get_features()
3034 if (!chip->chip_delay) in nand_set_defaults()
3035 chip->chip_delay = 20; in nand_set_defaults()
3038 if (chip->cmdfunc == NULL) in nand_set_defaults()
3039 chip->cmdfunc = nand_command; in nand_set_defaults()
3042 if (chip->waitfunc == NULL) in nand_set_defaults()
3043 chip->waitfunc = nand_wait; in nand_set_defaults()
3045 if (!chip->select_chip) in nand_set_defaults()
3046 chip->select_chip = nand_select_chip; in nand_set_defaults()
3048 /* set for ONFI nand */ in nand_set_defaults()
3049 if (!chip->onfi_set_features) in nand_set_defaults()
3050 chip->onfi_set_features = nand_onfi_set_features; in nand_set_defaults()
3051 if (!chip->onfi_get_features) in nand_set_defaults()
3052 chip->onfi_get_features = nand_onfi_get_features; in nand_set_defaults()
3055 if (!chip->read_byte || chip->read_byte == nand_read_byte) in nand_set_defaults()
3056 chip->read_byte = busw ? nand_read_byte16 : nand_read_byte; in nand_set_defaults()
3057 if (!chip->read_word) in nand_set_defaults()
3058 chip->read_word = nand_read_word; in nand_set_defaults()
3059 if (!chip->block_bad) in nand_set_defaults()
3060 chip->block_bad = nand_block_bad; in nand_set_defaults()
3061 if (!chip->block_markbad) in nand_set_defaults()
3062 chip->block_markbad = nand_default_block_markbad; in nand_set_defaults()
3063 if (!chip->write_buf || chip->write_buf == nand_write_buf) in nand_set_defaults()
3064 chip->write_buf = busw ? nand_write_buf16 : nand_write_buf; in nand_set_defaults()
3065 if (!chip->write_byte || chip->write_byte == nand_write_byte) in nand_set_defaults()
3066 chip->write_byte = busw ? nand_write_byte16 : nand_write_byte; in nand_set_defaults()
3067 if (!chip->read_buf || chip->read_buf == nand_read_buf) in nand_set_defaults()
3068 chip->read_buf = busw ? nand_read_buf16 : nand_read_buf; in nand_set_defaults()
3069 if (!chip->scan_bbt) in nand_set_defaults()
3070 chip->scan_bbt = nand_default_bbt; in nand_set_defaults()
3072 if (!chip->controller) { in nand_set_defaults()
3073 chip->controller = &chip->hwcontrol; in nand_set_defaults()
3074 spin_lock_init(&chip->controller->lock); in nand_set_defaults()
3075 init_waitqueue_head(&chip->controller->wq); in nand_set_defaults()
3078 if (!chip->buf_align) in nand_set_defaults()
3079 chip->buf_align = 1; in nand_set_defaults()
3088 s[len - 1] = 0; in sanitize_string()
3091 for (i = 0; i < len - 1; i++) { in sanitize_string()
3103 while (len--) { in onfi_crc16()
3119 struct onfi_ext_ecc_info *ecc; in nand_flash_detect_ext_param_page() local
3121 int ret = -EINVAL; in nand_flash_detect_ext_param_page()
3125 len = le16_to_cpu(p->ext_param_page_length) * 16; in nand_flash_detect_ext_param_page()
3128 return -ENOMEM; in nand_flash_detect_ext_param_page()
3131 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); in nand_flash_detect_ext_param_page()
3134 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, in nand_flash_detect_ext_param_page()
3135 sizeof(*p) * p->num_of_param_pages , -1); in nand_flash_detect_ext_param_page()
3138 chip->read_buf(mtd, (uint8_t *)ep, len); in nand_flash_detect_ext_param_page()
3139 if ((onfi_crc16(ONFI_CRC_BASE, ((uint8_t *)ep) + 2, len - 2) in nand_flash_detect_ext_param_page()
3140 != le16_to_cpu(ep->crc))) { in nand_flash_detect_ext_param_page()
3149 if (strncmp((char *)ep->sig, "EPPS", 4)) { in nand_flash_detect_ext_param_page()
3154 /* find the ECC section. */ in nand_flash_detect_ext_param_page()
3157 s = ep->sections + i; in nand_flash_detect_ext_param_page()
3158 if (s->type == ONFI_SECTION_TYPE_2) in nand_flash_detect_ext_param_page()
3160 cursor += s->length * 16; in nand_flash_detect_ext_param_page()
3163 pr_debug("We can not find the ECC section.\n"); in nand_flash_detect_ext_param_page()
3168 ecc = (struct onfi_ext_ecc_info *)cursor; in nand_flash_detect_ext_param_page()
3170 if (!ecc->codeword_size) { in nand_flash_detect_ext_param_page()
3175 chip->ecc_strength_ds = ecc->ecc_bits; in nand_flash_detect_ext_param_page()
3176 chip->ecc_step_ds = 1 << ecc->codeword_size; in nand_flash_detect_ext_param_page()
3189 return chip->onfi_set_features(mtd, chip, ONFI_FEATURE_ADDR_READ_RETRY, in nand_setup_read_retry_micron()
3194 * Configure chip properties from Micron vendor-specific ONFI table
3199 struct nand_onfi_vendor_micron *micron = (void *)p->vendor; in nand_onfi_detect_micron()
3201 if (le16_to_cpu(p->vendor_revision) < 1) in nand_onfi_detect_micron()
3204 chip->read_retries = micron->read_retry_options; in nand_onfi_detect_micron()
3205 chip->setup_read_retry = nand_setup_read_retry_micron; in nand_onfi_detect_micron()
3209 * Check if the NAND chip is ONFI compliant, returns 1 if it is, 0 otherwise.
3214 struct nand_onfi_params *p = &chip->onfi_params; in nand_flash_detect_onfi()
3219 chip->cmdfunc(mtd, NAND_CMD_READID, 0x20, -1); in nand_flash_detect_onfi()
3220 if (chip->read_byte(mtd) != 'O' || chip->read_byte(mtd) != 'N' || in nand_flash_detect_onfi()
3221 chip->read_byte(mtd) != 'F' || chip->read_byte(mtd) != 'I') in nand_flash_detect_onfi()
3224 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0, -1); in nand_flash_detect_onfi()
3227 ((uint8_t *)p)[j] = chip->read_byte(mtd); in nand_flash_detect_onfi()
3229 le16_to_cpu(p->crc)) { in nand_flash_detect_onfi()
3240 val = le16_to_cpu(p->revision); in nand_flash_detect_onfi()
3242 chip->onfi_version = 23; in nand_flash_detect_onfi()
3244 chip->onfi_version = 22; in nand_flash_detect_onfi()
3246 chip->onfi_version = 21; in nand_flash_detect_onfi()
3248 chip->onfi_version = 20; in nand_flash_detect_onfi()
3250 chip->onfi_version = 10; in nand_flash_detect_onfi()
3252 if (!chip->onfi_version) { in nand_flash_detect_onfi()
3257 sanitize_string(p->manufacturer, sizeof(p->manufacturer)); in nand_flash_detect_onfi()
3258 sanitize_string(p->model, sizeof(p->model)); in nand_flash_detect_onfi()
3259 if (!mtd->name) in nand_flash_detect_onfi()
3260 mtd->name = p->model; in nand_flash_detect_onfi()
3262 mtd->writesize = le32_to_cpu(p->byte_per_page); in nand_flash_detect_onfi()
3265 * pages_per_block and blocks_per_lun may not be a power-of-2 size in nand_flash_detect_onfi()
3267 * dimensions will be power-of-2, so just truncate the remaining area. in nand_flash_detect_onfi()
3269 mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); in nand_flash_detect_onfi()
3270 mtd->erasesize *= mtd->writesize; in nand_flash_detect_onfi()
3272 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); in nand_flash_detect_onfi()
3275 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); in nand_flash_detect_onfi()
3276 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; in nand_flash_detect_onfi()
3277 chip->bits_per_cell = p->bits_per_cell; in nand_flash_detect_onfi()
3284 if (p->ecc_bits != 0xff) { in nand_flash_detect_onfi()
3285 chip->ecc_strength_ds = p->ecc_bits; in nand_flash_detect_onfi()
3286 chip->ecc_step_ds = 512; in nand_flash_detect_onfi()
3287 } else if (chip->onfi_version >= 21 && in nand_flash_detect_onfi()
3293 * by the chip->cmdfunc. So try to update the chip->cmdfunc in nand_flash_detect_onfi()
3296 if (mtd->writesize > 512 && chip->cmdfunc == nand_command) in nand_flash_detect_onfi()
3297 chip->cmdfunc = nand_command_lp; in nand_flash_detect_onfi()
3303 pr_warn("Could not retrieve ONFI ECC requirements\n"); in nand_flash_detect_onfi()
3306 if (p->jedec_id == NAND_MFR_MICRON) in nand_flash_detect_onfi()
3320 * Check if the NAND chip is JEDEC compliant, returns 1 if it is, 0 otherwise.
3325 struct nand_jedec_params *p = &chip->jedec_params; in nand_flash_detect_jedec()
3326 struct jedec_ecc_info *ecc; in nand_flash_detect_jedec() local
3331 chip->cmdfunc(mtd, NAND_CMD_READID, 0x40, -1); in nand_flash_detect_jedec()
3332 if (chip->read_byte(mtd) != 'J' || chip->read_byte(mtd) != 'E' || in nand_flash_detect_jedec()
3333 chip->read_byte(mtd) != 'D' || chip->read_byte(mtd) != 'E' || in nand_flash_detect_jedec()
3334 chip->read_byte(mtd) != 'C') in nand_flash_detect_jedec()
3337 chip->cmdfunc(mtd, NAND_CMD_PARAM, 0x40, -1); in nand_flash_detect_jedec()
3340 ((uint8_t *)p)[j] = chip->read_byte(mtd); in nand_flash_detect_jedec()
3343 le16_to_cpu(p->crc)) in nand_flash_detect_jedec()
3353 val = le16_to_cpu(p->revision); in nand_flash_detect_jedec()
3355 chip->jedec_version = 10; in nand_flash_detect_jedec()
3357 chip->jedec_version = 1; /* vendor specific version */ in nand_flash_detect_jedec()
3359 if (!chip->jedec_version) { in nand_flash_detect_jedec()
3364 sanitize_string(p->manufacturer, sizeof(p->manufacturer)); in nand_flash_detect_jedec()
3365 sanitize_string(p->model, sizeof(p->model)); in nand_flash_detect_jedec()
3366 if (!mtd->name) in nand_flash_detect_jedec()
3367 mtd->name = p->model; in nand_flash_detect_jedec()
3369 mtd->writesize = le32_to_cpu(p->byte_per_page); in nand_flash_detect_jedec()
3372 mtd->erasesize = 1 << (fls(le32_to_cpu(p->pages_per_block)) - 1); in nand_flash_detect_jedec()
3373 mtd->erasesize *= mtd->writesize; in nand_flash_detect_jedec()
3375 mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page); in nand_flash_detect_jedec()
3378 chip->chipsize = 1 << (fls(le32_to_cpu(p->blocks_per_lun)) - 1); in nand_flash_detect_jedec()
3379 chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count; in nand_flash_detect_jedec()
3380 chip->bits_per_cell = p->bits_per_cell; in nand_flash_detect_jedec()
3387 /* ECC info */ in nand_flash_detect_jedec()
3388 ecc = &p->ecc_info[0]; in nand_flash_detect_jedec()
3390 if (ecc->codeword_size >= 9) { in nand_flash_detect_jedec()
3391 chip->ecc_strength_ds = ecc->ecc_bits; in nand_flash_detect_jedec()
3392 chip->ecc_step_ds = 1 << ecc->codeword_size; in nand_flash_detect_jedec()
3401 * nand_id_has_period - Check if an ID string has a given wraparound period
3408 * period of 3). This is a helper function for nand_id_len(). Returns non-zero
3422 * nand_id_len - Get the length of an ID string returned by CMD_READID
3433 /* Find last non-zero byte */ in nand_id_len()
3434 for (last_nonzero = arrlen - 1; last_nonzero >= 0; last_nonzero--) in nand_id_len()
3452 if (last_nonzero < arrlen - 1) in nand_id_len()
3470 * Many new NAND share similar device ID codes, which represent the size of the
3472 * manufacturer-specific "extended ID" decoding patterns.
3479 chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in nand_decode_ext_id()
3491 * Check for ID length, non-zero 6th byte, cell type, and Hynix/Samsung in nand_decode_ext_id()
3497 mtd->writesize = 2048 << (extid & 0x03); in nand_decode_ext_id()
3502 mtd->oobsize = 128; in nand_decode_ext_id()
3505 mtd->oobsize = 218; in nand_decode_ext_id()
3508 mtd->oobsize = 400; in nand_decode_ext_id()
3511 mtd->oobsize = 436; in nand_decode_ext_id()
3514 mtd->oobsize = 512; in nand_decode_ext_id()
3517 mtd->oobsize = 640; in nand_decode_ext_id()
3521 mtd->oobsize = 1024; in nand_decode_ext_id()
3526 mtd->erasesize = (128 * 1024) << in nand_decode_ext_id()
3534 mtd->writesize = 2048 << (extid & 0x03); in nand_decode_ext_id()
3539 mtd->oobsize = 128; in nand_decode_ext_id()
3542 mtd->oobsize = 224; in nand_decode_ext_id()
3545 mtd->oobsize = 448; in nand_decode_ext_id()
3548 mtd->oobsize = 64; in nand_decode_ext_id()
3551 mtd->oobsize = 32; in nand_decode_ext_id()
3554 mtd->oobsize = 16; in nand_decode_ext_id()
3557 mtd->oobsize = 640; in nand_decode_ext_id()
3564 mtd->erasesize = (128 * 1024) << tmp; in nand_decode_ext_id()
3566 mtd->erasesize = 768 * 1024; in nand_decode_ext_id()
3568 mtd->erasesize = (64 * 1024) << tmp; in nand_decode_ext_id()
3572 mtd->writesize = 1024 << (extid & 0x03); in nand_decode_ext_id()
3575 mtd->oobsize = (8 << (extid & 0x01)) * in nand_decode_ext_id()
3576 (mtd->writesize >> 9); in nand_decode_ext_id()
3579 mtd->erasesize = (64 * 1024) << (extid & 0x03); in nand_decode_ext_id()
3588 * - ID byte 6, bits[2:0]: 100b -> 43nm, 101b -> 32nm, in nand_decode_ext_id()
3589 * 110b -> 24nm in nand_decode_ext_id()
3590 * - ID byte 5, bit[7]: 1 -> BENAND, 0 -> raw SLC in nand_decode_ext_id()
3596 mtd->oobsize = 32 * mtd->writesize >> 9; in nand_decode_ext_id()
3613 mtd->erasesize = type->erasesize; in nand_decode_id()
3614 mtd->writesize = type->pagesize; in nand_decode_id()
3615 mtd->oobsize = mtd->writesize / 32; in nand_decode_id()
3616 *busw = type->options & NAND_BUSWIDTH_16; in nand_decode_id()
3618 /* All legacy ID NAND are small-page, SLC */ in nand_decode_id()
3619 chip->bits_per_cell = 1; in nand_decode_id()
3625 * Data sheet (5 byte ID): Spansion S30ML-P ORNAND (p.39) in nand_decode_id()
3629 && mtd->writesize == 512) { in nand_decode_id()
3630 mtd->erasesize = 128 * 1024; in nand_decode_id()
3631 mtd->erasesize <<= ((id_data[3] & 0x03) << 1); in nand_decode_id()
3638 * page size, cell-type information).
3646 if (mtd->writesize > 512 || (chip->options & NAND_BUSWIDTH_16)) in nand_decode_bbm_options()
3647 chip->badblockpos = NAND_LARGE_BADBLOCK_POS; in nand_decode_bbm_options()
3649 chip->badblockpos = NAND_SMALL_BADBLOCK_POS; in nand_decode_bbm_options()
3660 chip->bbt_options |= NAND_BBT_SCANLASTPAGE; in nand_decode_bbm_options()
3667 (mtd->writesize == 2048 && in nand_decode_bbm_options()
3669 chip->bbt_options |= NAND_BBT_SCAN2NDPAGE; in nand_decode_bbm_options()
3674 return type->id_len; in is_full_id_nand()
3680 if (!strncmp((char *)type->id, (char *)id_data, type->id_len)) { in find_full_id_nand()
3681 mtd->writesize = type->pagesize; in find_full_id_nand()
3682 mtd->erasesize = type->erasesize; in find_full_id_nand()
3683 mtd->oobsize = type->oobsize; in find_full_id_nand()
3685 chip->bits_per_cell = nand_get_bits_per_cell(id_data[2]); in find_full_id_nand()
3686 chip->chipsize = (uint64_t)type->chipsize << 20; in find_full_id_nand()
3687 chip->options |= type->options; in find_full_id_nand()
3688 chip->ecc_strength_ds = NAND_ECC_STRENGTH(type); in find_full_id_nand()
3689 chip->ecc_step_ds = NAND_ECC_STEP(type); in find_full_id_nand()
3690 chip->onfi_timing_mode_default = in find_full_id_nand()
3691 type->onfi_timing_mode_default; in find_full_id_nand()
3693 *busw = type->options & NAND_BUSWIDTH_16; in find_full_id_nand()
3695 if (!mtd->name) in find_full_id_nand()
3696 mtd->name = type->name; in find_full_id_nand()
3717 * after power-up. in nand_get_flash_type()
3722 chip->select_chip(mtd, 0); in nand_get_flash_type()
3725 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_get_flash_type()
3728 *maf_id = chip->read_byte(mtd); in nand_get_flash_type()
3729 *dev_id = chip->read_byte(mtd); in nand_get_flash_type()
3732 * Try again to make sure, as some systems the bus-hold or other in nand_get_flash_type()
3734 * possibly credible NAND flash to appear. If the two results do in nand_get_flash_type()
3738 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_get_flash_type()
3742 id_data[i] = chip->read_byte(mtd); in nand_get_flash_type()
3747 return ERR_PTR(-ENODEV); in nand_get_flash_type()
3753 for (; type->name != NULL; type++) { in nand_get_flash_type()
3757 } else if (*dev_id == type->dev_id) { in nand_get_flash_type()
3762 chip->onfi_version = 0; in nand_get_flash_type()
3763 if (!type->name || !type->pagesize) { in nand_get_flash_type()
3773 if (!type->name) in nand_get_flash_type()
3774 return ERR_PTR(-ENODEV); in nand_get_flash_type()
3776 if (!mtd->name) in nand_get_flash_type()
3777 mtd->name = type->name; in nand_get_flash_type()
3779 chip->chipsize = (uint64_t)type->chipsize << 20; in nand_get_flash_type()
3781 if (!type->pagesize) { in nand_get_flash_type()
3788 chip->options |= type->options; in nand_get_flash_type()
3794 if (*maf_id != NAND_MFR_SAMSUNG && !type->pagesize) in nand_get_flash_type()
3795 chip->options &= ~NAND_SAMSUNG_LP_OPTIONS; in nand_get_flash_type()
3804 if (chip->options & NAND_BUSWIDTH_AUTO) { in nand_get_flash_type()
3805 WARN_ON(chip->options & NAND_BUSWIDTH_16); in nand_get_flash_type()
3806 chip->options |= busw; in nand_get_flash_type()
3808 } else if (busw != (chip->options & NAND_BUSWIDTH_16)) { in nand_get_flash_type()
3815 pr_info("%s %s\n", nand_manuf_ids[maf_idx].name, mtd->name); in nand_get_flash_type()
3817 (chip->options & NAND_BUSWIDTH_16) ? 16 : 8, in nand_get_flash_type()
3819 return ERR_PTR(-EINVAL); in nand_get_flash_type()
3825 chip->page_shift = ffs(mtd->writesize) - 1; in nand_get_flash_type()
3826 /* Convert chipsize to number of pages per chip -1 */ in nand_get_flash_type()
3827 chip->pagemask = (chip->chipsize >> chip->page_shift) - 1; in nand_get_flash_type()
3829 chip->bbt_erase_shift = chip->phys_erase_shift = in nand_get_flash_type()
3830 ffs(mtd->erasesize) - 1; in nand_get_flash_type()
3831 if (chip->chipsize & 0xffffffff) in nand_get_flash_type()
3832 chip->chip_shift = ffs((unsigned)chip->chipsize) - 1; in nand_get_flash_type()
3834 chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)); in nand_get_flash_type()
3835 chip->chip_shift += 32 - 1; in nand_get_flash_type()
3838 if (chip->chip_shift - chip->page_shift > 16) in nand_get_flash_type()
3839 chip->options |= NAND_ROW_ADDR_3; in nand_get_flash_type()
3841 chip->badblockbits = 8; in nand_get_flash_type()
3842 chip->erase = single_erase; in nand_get_flash_type()
3845 if (mtd->writesize > 512 && chip->cmdfunc == nand_command) in nand_get_flash_type()
3846 chip->cmdfunc = nand_command_lp; in nand_get_flash_type()
3852 if (chip->onfi_version) in nand_get_flash_type()
3854 chip->onfi_params.model); in nand_get_flash_type()
3855 else if (chip->jedec_version) in nand_get_flash_type()
3857 chip->jedec_params.model); in nand_get_flash_type()
3860 type->name); in nand_get_flash_type()
3862 if (chip->jedec_version) in nand_get_flash_type()
3864 chip->jedec_params.model); in nand_get_flash_type()
3867 type->name); in nand_get_flash_type()
3870 type->name); in nand_get_flash_type()
3874 (int)(chip->chipsize >> 20), nand_is_slc(chip) ? "SLC" : "MLC", in nand_get_flash_type()
3875 mtd->erasesize >> 10, mtd->writesize, mtd->oobsize); in nand_get_flash_type()
3885 int ret, ecc_mode = -1, ecc_strength, ecc_step; in nand_dt_init()
3886 const void *blob = gd->fdt_blob; in nand_dt_init()
3889 ret = fdtdec_get_int(blob, node, "nand-bus-width", -1); in nand_dt_init()
3891 chip->options |= NAND_BUSWIDTH_16; in nand_dt_init()
3893 if (fdtdec_get_bool(blob, node, "nand-on-flash-bbt")) in nand_dt_init()
3894 chip->bbt_options |= NAND_BBT_USE_FLASH; in nand_dt_init()
3896 str = fdt_getprop(blob, node, "nand-ecc-mode", NULL); in nand_dt_init()
3913 ecc_strength = fdtdec_get_int(blob, node, "nand-ecc-strength", -1); in nand_dt_init()
3914 ecc_step = fdtdec_get_int(blob, node, "nand-ecc-step-size", -1); in nand_dt_init()
3919 return -EINVAL; in nand_dt_init()
3923 chip->ecc.mode = ecc_mode; in nand_dt_init()
3926 chip->ecc.strength = ecc_strength; in nand_dt_init()
3929 chip->ecc.size = ecc_step; in nand_dt_init()
3931 if (fdt_getprop(blob, node, "nand-ecc-maximize", NULL)) in nand_dt_init()
3932 chip->ecc.options |= NAND_ECC_MAXIMIZE; in nand_dt_init()
3944 * nand_scan_ident - [NAND Interface] Scan for the NAND device
3947 * @table: alternative NAND ID table
3961 if (chip->flash_node) { in nand_scan_ident()
3962 ret = nand_dt_init(mtd, chip, chip->flash_node); in nand_scan_ident()
3968 nand_set_defaults(chip, chip->options & NAND_BUSWIDTH_16); in nand_scan_ident()
3975 if (!(chip->options & NAND_SCAN_SILENT_NODEV)) in nand_scan_ident()
3976 pr_warn("No NAND device found\n"); in nand_scan_ident()
3977 chip->select_chip(mtd, -1); in nand_scan_ident()
3981 /* Initialize the ->data_interface field. */ in nand_scan_ident()
3990 * ->data_interface and ->default_onfi_timing_mode were set. in nand_scan_ident()
3998 chip->select_chip(mtd, -1); in nand_scan_ident()
4005 chip->select_chip(mtd, i); in nand_scan_ident()
4007 chip->cmdfunc(mtd, NAND_CMD_READID, 0x00, -1); in nand_scan_ident()
4009 if (nand_maf_id != chip->read_byte(mtd) || in nand_scan_ident()
4010 nand_dev_id != chip->read_byte(mtd)) { in nand_scan_ident()
4011 chip->select_chip(mtd, -1); in nand_scan_ident()
4014 chip->select_chip(mtd, -1); in nand_scan_ident()
4023 chip->numchips = i; in nand_scan_ident()
4024 mtd->size = i * chip->chipsize; in nand_scan_ident()
4031 * nand_check_ecc_caps - check the sanity of preset ECC settings
4032 * @chip: nand chip info structure
4033 * @caps: ECC caps info structure
4034 * @oobavail: OOB size that the ECC engine can use
4036 * When ECC step size and strength are already set, check if they are supported
4037 * by the controller and the calculated ECC bytes fit within the chip's OOB.
4038 * On success, the calculated ECC bytes is set.
4045 int preset_step = chip->ecc.size; in nand_check_ecc_caps()
4046 int preset_strength = chip->ecc.strength; in nand_check_ecc_caps()
4051 return -EINVAL; in nand_check_ecc_caps()
4054 return -ENODATA; in nand_check_ecc_caps()
4056 nsteps = mtd->writesize / preset_step; in nand_check_ecc_caps()
4058 for (i = 0; i < caps->nstepinfos; i++) { in nand_check_ecc_caps()
4059 stepinfo = &caps->stepinfos[i]; in nand_check_ecc_caps()
4061 if (stepinfo->stepsize != preset_step) in nand_check_ecc_caps()
4064 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_check_ecc_caps()
4065 if (stepinfo->strengths[j] != preset_strength) in nand_check_ecc_caps()
4068 ecc_bytes = caps->calc_ecc_bytes(preset_step, in nand_check_ecc_caps()
4074 pr_err("ECC (step, strength) = (%d, %d) does not fit in OOB", in nand_check_ecc_caps()
4076 return -ENOSPC; in nand_check_ecc_caps()
4079 chip->ecc.bytes = ecc_bytes; in nand_check_ecc_caps()
4085 pr_err("ECC (step, strength) = (%d, %d) not supported on this controller", in nand_check_ecc_caps()
4088 return -ENOTSUPP; in nand_check_ecc_caps()
4093 * nand_match_ecc_req - meet the chip's requirement with least ECC bytes
4094 * @chip: nand chip info structure
4095 * @caps: ECC engine caps info structure
4096 * @oobavail: OOB size that the ECC engine can use
4098 * If a chip's ECC requirement is provided, try to meet it with the least
4099 * number of ECC bytes (i.e. with the largest number of OOB-free bytes).
4100 * On success, the chosen ECC settings are set.
4107 int req_step = chip->ecc_step_ds; in nand_match_ecc_req()
4108 int req_strength = chip->ecc_strength_ds; in nand_match_ecc_req()
4115 return -EINVAL; in nand_match_ecc_req()
4117 /* No information provided by the NAND chip */ in nand_match_ecc_req()
4119 return -ENOTSUPP; in nand_match_ecc_req()
4122 req_corr = mtd->writesize / req_step * req_strength; in nand_match_ecc_req()
4124 for (i = 0; i < caps->nstepinfos; i++) { in nand_match_ecc_req()
4125 stepinfo = &caps->stepinfos[i]; in nand_match_ecc_req()
4126 step_size = stepinfo->stepsize; in nand_match_ecc_req()
4128 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_match_ecc_req()
4129 strength = stepinfo->strengths[j]; in nand_match_ecc_req()
4139 if (mtd->writesize % step_size) in nand_match_ecc_req()
4142 nsteps = mtd->writesize / step_size; in nand_match_ecc_req()
4144 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_match_ecc_req()
4155 * with the least number of ECC bytes. in nand_match_ecc_req()
4167 return -ENOTSUPP; in nand_match_ecc_req()
4169 chip->ecc.size = best_step; in nand_match_ecc_req()
4170 chip->ecc.strength = best_strength; in nand_match_ecc_req()
4171 chip->ecc.bytes = best_ecc_bytes; in nand_match_ecc_req()
4178 * nand_maximize_ecc - choose the max ECC strength available
4179 * @chip: nand chip info structure
4180 * @caps: ECC engine caps info structure
4181 * @oobavail: OOB size that the ECC engine can use
4183 * Choose the max ECC strength that is supported on the controller, and can fit
4184 * within the chip's OOB. On success, the chosen ECC settings are set.
4198 return -EINVAL; in nand_maximize_ecc()
4200 for (i = 0; i < caps->nstepinfos; i++) { in nand_maximize_ecc()
4201 stepinfo = &caps->stepinfos[i]; in nand_maximize_ecc()
4202 step_size = stepinfo->stepsize; in nand_maximize_ecc()
4204 /* If chip->ecc.size is already set, respect it */ in nand_maximize_ecc()
4205 if (chip->ecc.size && step_size != chip->ecc.size) in nand_maximize_ecc()
4208 for (j = 0; j < stepinfo->nstrengths; j++) { in nand_maximize_ecc()
4209 strength = stepinfo->strengths[j]; in nand_maximize_ecc()
4211 if (mtd->writesize % step_size) in nand_maximize_ecc()
4214 nsteps = mtd->writesize / step_size; in nand_maximize_ecc()
4216 ecc_bytes = caps->calc_ecc_bytes(step_size, strength); in nand_maximize_ecc()
4240 return -ENOTSUPP; in nand_maximize_ecc()
4242 chip->ecc.size = best_step; in nand_maximize_ecc()
4243 chip->ecc.strength = best_strength; in nand_maximize_ecc()
4244 chip->ecc.bytes = best_ecc_bytes; in nand_maximize_ecc()
4267 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_ecc_strength_good() local
4270 if (ecc->size == 0 || chip->ecc_step_ds == 0) in nand_ecc_strength_good()
4278 corr = (mtd->writesize * ecc->strength) / ecc->size; in nand_ecc_strength_good()
4279 ds_corr = (mtd->writesize * chip->ecc_strength_ds) / chip->ecc_step_ds; in nand_ecc_strength_good()
4281 return corr >= ds_corr && ecc->strength >= chip->ecc_strength_ds; in nand_ecc_strength_good()
4286 struct nand_ecc_ctrl *ecc = &chip->ecc; in invalid_ecc_page_accessors() local
4288 if (nand_standard_page_accessors(ecc)) in invalid_ecc_page_accessors()
4292 * NAND_ECC_CUSTOM_PAGE_ACCESS flag is set, make sure the NAND in invalid_ecc_page_accessors()
4297 return (!ecc->read_page || !ecc->write_page || in invalid_ecc_page_accessors()
4298 !ecc->read_page_raw || !ecc->write_page_raw || in invalid_ecc_page_accessors()
4299 (NAND_HAS_SUBPAGE_READ(chip) && !ecc->read_subpage) || in invalid_ecc_page_accessors()
4300 (NAND_HAS_SUBPAGE_WRITE(chip) && !ecc->write_subpage && in invalid_ecc_page_accessors()
4301 ecc->hwctl && ecc->calculate)); in invalid_ecc_page_accessors()
4305 * nand_scan_tail - [NAND Interface] Scan for the NAND device
4316 struct nand_ecc_ctrl *ecc = &chip->ecc; in nand_scan_tail() local
4319 /* New bad blocks should be marked in OOB, flash-based BBT, or both */ in nand_scan_tail()
4320 BUG_ON((chip->bbt_options & NAND_BBT_NO_OOB_BBM) && in nand_scan_tail()
4321 !(chip->bbt_options & NAND_BBT_USE_FLASH)); in nand_scan_tail()
4324 pr_err("Invalid ECC page accessors setup\n"); in nand_scan_tail()
4325 return -EINVAL; in nand_scan_tail()
4328 if (!(chip->options & NAND_OWN_BUFFERS)) { in nand_scan_tail()
4330 chip->buffers = nbuf; in nand_scan_tail()
4332 if (!chip->buffers) in nand_scan_tail()
4333 return -ENOMEM; in nand_scan_tail()
4337 chip->oob_poi = chip->buffers->databuf + mtd->writesize; in nand_scan_tail()
4342 if (!ecc->layout && (ecc->mode != NAND_ECC_SOFT_BCH)) { in nand_scan_tail()
4343 switch (mtd->oobsize) { in nand_scan_tail()
4346 ecc->layout = &nand_oob_8; in nand_scan_tail()
4349 ecc->layout = &nand_oob_16; in nand_scan_tail()
4352 ecc->layout = &nand_oob_64; in nand_scan_tail()
4355 ecc->layout = &nand_oob_128; in nand_scan_tail()
4360 mtd->oobsize); in nand_scan_tail()
4365 if (!chip->write_page) in nand_scan_tail()
4366 chip->write_page = nand_write_page; in nand_scan_tail()
4369 * Check ECC mode, default to software if 3byte/512byte hardware ECC is in nand_scan_tail()
4370 * selected and we have 256 byte pagesize fallback to software ECC in nand_scan_tail()
4373 switch (ecc->mode) { in nand_scan_tail()
4376 if (!ecc->calculate || !ecc->correct || !ecc->hwctl) { in nand_scan_tail()
4377 pr_warn("No ECC functions supplied; hardware ECC not possible\n"); in nand_scan_tail()
4380 if (!ecc->read_page) in nand_scan_tail()
4381 ecc->read_page = nand_read_page_hwecc_oob_first; in nand_scan_tail()
4385 if (!ecc->read_page) in nand_scan_tail()
4386 ecc->read_page = nand_read_page_hwecc; in nand_scan_tail()
4387 if (!ecc->write_page) in nand_scan_tail()
4388 ecc->write_page = nand_write_page_hwecc; in nand_scan_tail()
4389 if (!ecc->read_page_raw) in nand_scan_tail()
4390 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
4391 if (!ecc->write_page_raw) in nand_scan_tail()
4392 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
4393 if (!ecc->read_oob) in nand_scan_tail()
4394 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
4395 if (!ecc->write_oob) in nand_scan_tail()
4396 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
4397 if (!ecc->read_subpage) in nand_scan_tail()
4398 ecc->read_subpage = nand_read_subpage; in nand_scan_tail()
4399 if (!ecc->write_subpage && ecc->hwctl && ecc->calculate) in nand_scan_tail()
4400 ecc->write_subpage = nand_write_subpage_hwecc; in nand_scan_tail()
4403 if ((!ecc->calculate || !ecc->correct || !ecc->hwctl) && in nand_scan_tail()
4404 (!ecc->read_page || in nand_scan_tail()
4405 ecc->read_page == nand_read_page_hwecc || in nand_scan_tail()
4406 !ecc->write_page || in nand_scan_tail()
4407 ecc->write_page == nand_write_page_hwecc)) { in nand_scan_tail()
4408 pr_warn("No ECC functions supplied; hardware ECC not possible\n"); in nand_scan_tail()
4412 if (!ecc->read_page) in nand_scan_tail()
4413 ecc->read_page = nand_read_page_syndrome; in nand_scan_tail()
4414 if (!ecc->write_page) in nand_scan_tail()
4415 ecc->write_page = nand_write_page_syndrome; in nand_scan_tail()
4416 if (!ecc->read_page_raw) in nand_scan_tail()
4417 ecc->read_page_raw = nand_read_page_raw_syndrome; in nand_scan_tail()
4418 if (!ecc->write_page_raw) in nand_scan_tail()
4419 ecc->write_page_raw = nand_write_page_raw_syndrome; in nand_scan_tail()
4420 if (!ecc->read_oob) in nand_scan_tail()
4421 ecc->read_oob = nand_read_oob_syndrome; in nand_scan_tail()
4422 if (!ecc->write_oob) in nand_scan_tail()
4423 ecc->write_oob = nand_write_oob_syndrome; in nand_scan_tail()
4425 if (mtd->writesize >= ecc->size) { in nand_scan_tail()
4426 if (!ecc->strength) { in nand_scan_tail()
4427 pr_warn("Driver must set ecc.strength when using hardware ECC\n"); in nand_scan_tail()
4432 pr_warn("%d byte HW ECC not possible on %d byte page size, fallback to SW ECC\n", in nand_scan_tail()
4433 ecc->size, mtd->writesize); in nand_scan_tail()
4434 ecc->mode = NAND_ECC_SOFT; in nand_scan_tail()
4437 ecc->calculate = nand_calculate_ecc; in nand_scan_tail()
4438 ecc->correct = nand_correct_data; in nand_scan_tail()
4439 ecc->read_page = nand_read_page_swecc; in nand_scan_tail()
4440 ecc->read_subpage = nand_read_subpage; in nand_scan_tail()
4441 ecc->write_page = nand_write_page_swecc; in nand_scan_tail()
4442 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
4443 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
4444 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
4445 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
4446 if (!ecc->size) in nand_scan_tail()
4447 ecc->size = 256; in nand_scan_tail()
4448 ecc->bytes = 3; in nand_scan_tail()
4449 ecc->strength = 1; in nand_scan_tail()
4457 ecc->calculate = nand_bch_calculate_ecc; in nand_scan_tail()
4458 ecc->correct = nand_bch_correct_data; in nand_scan_tail()
4459 ecc->read_page = nand_read_page_swecc; in nand_scan_tail()
4460 ecc->read_subpage = nand_read_subpage; in nand_scan_tail()
4461 ecc->write_page = nand_write_page_swecc; in nand_scan_tail()
4462 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
4463 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
4464 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
4465 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
4467 * Board driver should supply ecc.size and ecc.strength values in nand_scan_tail()
4471 if (!ecc->size && (mtd->oobsize >= 64)) { in nand_scan_tail()
4472 ecc->size = 512; in nand_scan_tail()
4473 ecc->strength = 4; in nand_scan_tail()
4477 ecc->bytes = 0; in nand_scan_tail()
4478 ecc->priv = nand_bch_init(mtd); in nand_scan_tail()
4479 if (!ecc->priv) { in nand_scan_tail()
4480 pr_warn("BCH ECC initialization failed!\n"); in nand_scan_tail()
4487 ecc->read_page = nand_read_page_raw; in nand_scan_tail()
4488 ecc->write_page = nand_write_page_raw; in nand_scan_tail()
4489 ecc->read_oob = nand_read_oob_std; in nand_scan_tail()
4490 ecc->read_page_raw = nand_read_page_raw; in nand_scan_tail()
4491 ecc->write_page_raw = nand_write_page_raw; in nand_scan_tail()
4492 ecc->write_oob = nand_write_oob_std; in nand_scan_tail()
4493 ecc->size = mtd->writesize; in nand_scan_tail()
4494 ecc->bytes = 0; in nand_scan_tail()
4495 ecc->strength = 0; in nand_scan_tail()
4499 pr_warn("Invalid NAND_ECC_MODE %d\n", ecc->mode); in nand_scan_tail()
4504 if (!ecc->read_oob_raw) in nand_scan_tail()
4505 ecc->read_oob_raw = ecc->read_oob; in nand_scan_tail()
4506 if (!ecc->write_oob_raw) in nand_scan_tail()
4507 ecc->write_oob_raw = ecc->write_oob; in nand_scan_tail()
4513 mtd->oobavail = 0; in nand_scan_tail()
4514 if (ecc->layout) { in nand_scan_tail()
4515 for (i = 0; ecc->layout->oobfree[i].length; i++) in nand_scan_tail()
4516 mtd->oobavail += ecc->layout->oobfree[i].length; in nand_scan_tail()
4519 /* ECC sanity check: warn if it's too weak */ in nand_scan_tail()
4521 …pr_warn("WARNING: %s: the ECC used on your system is too weak compared to the one required by the … in nand_scan_tail()
4522 mtd->name); in nand_scan_tail()
4525 * Set the number of read / write steps for one page depending on ECC in nand_scan_tail()
4528 ecc->steps = mtd->writesize / ecc->size; in nand_scan_tail()
4529 if (ecc->steps * ecc->size != mtd->writesize) { in nand_scan_tail()
4530 pr_warn("Invalid ECC parameters\n"); in nand_scan_tail()
4533 ecc->total = ecc->steps * ecc->bytes; in nand_scan_tail()
4535 /* Allow subpage writes up to ecc.steps. Not possible for MLC flash */ in nand_scan_tail()
4536 if (!(chip->options & NAND_NO_SUBPAGE_WRITE) && nand_is_slc(chip)) { in nand_scan_tail()
4537 switch (ecc->steps) { in nand_scan_tail()
4539 mtd->subpage_sft = 1; in nand_scan_tail()
4544 mtd->subpage_sft = 2; in nand_scan_tail()
4548 chip->subpagesize = mtd->writesize >> mtd->subpage_sft; in nand_scan_tail()
4551 chip->state = FL_READY; in nand_scan_tail()
4554 chip->pagebuf = -1; in nand_scan_tail()
4556 /* Large page NAND with SOFT_ECC should support subpage reads */ in nand_scan_tail()
4557 switch (ecc->mode) { in nand_scan_tail()
4560 if (chip->page_shift > 9) in nand_scan_tail()
4561 chip->options |= NAND_SUBPAGE_READ; in nand_scan_tail()
4569 mtd->type = nand_is_slc(chip) ? MTD_NANDFLASH : MTD_MLCNANDFLASH; in nand_scan_tail()
4570 mtd->flags = (chip->options & NAND_ROM) ? MTD_CAP_ROM : in nand_scan_tail()
4572 mtd->_erase = nand_erase; in nand_scan_tail()
4573 mtd->_panic_write = panic_nand_write; in nand_scan_tail()
4574 mtd->_read_oob = nand_read_oob; in nand_scan_tail()
4575 mtd->_write_oob = nand_write_oob; in nand_scan_tail()
4576 mtd->_sync = nand_sync; in nand_scan_tail()
4577 mtd->_lock = NULL; in nand_scan_tail()
4578 mtd->_unlock = NULL; in nand_scan_tail()
4579 mtd->_block_isreserved = nand_block_isreserved; in nand_scan_tail()
4580 mtd->_block_isbad = nand_block_isbad; in nand_scan_tail()
4581 mtd->_block_markbad = nand_block_markbad; in nand_scan_tail()
4582 mtd->writebufsize = mtd->writesize; in nand_scan_tail()
4584 /* propagate ecc info to mtd_info */ in nand_scan_tail()
4585 mtd->ecclayout = ecc->layout; in nand_scan_tail()
4586 mtd->ecc_strength = ecc->strength; in nand_scan_tail()
4587 mtd->ecc_step_size = ecc->size; in nand_scan_tail()
4593 if (!mtd->bitflip_threshold) in nand_scan_tail()
4594 mtd->bitflip_threshold = DIV_ROUND_UP(mtd->ecc_strength * 3, 4); in nand_scan_tail()
4601 * nand_scan - [NAND Interface] Scan for the NAND device
4623 MODULE_DESCRIPTION("Generic NAND flash driver code");