Lines Matching full:ecc
40 /* Macros to get byte and bit positions of ECC */
48 /* OOB placement block for use with hardware ecc generation */
377 * If HW ECC is enabled, we turn it on during init. There is
390 int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
398 for (i = 0; i < chip->ecc.steps; i++) {
399 toread = min_t(int, length, chip->ecc.prepad);
405 bufpoi += chip->ecc.bytes;
406 host->col_addr += chip->ecc.bytes;
407 length -= chip->ecc.bytes;
409 toread = min_t(int, length, chip->ecc.postpad);
421 mtd->writesize + chip->ecc.prepad, page);
422 bufpoi = buf + chip->ecc.prepad;
423 length = mtd->oobsize - chip->ecc.prepad;
424 for (i = 0; i < chip->ecc.steps; i++) {
425 toread = min_t(int, length, chip->ecc.bytes);
429 host->col_addr += chip->ecc.postpad + chip->ecc.prepad;
442 int eccsize = chip->ecc.size;
443 int eccbytes = chip->ecc.bytes;
444 int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
452 for (n = 0, steps = chip->ecc.steps; steps > 0; n++, steps--) {
458 if (chip->ecc.prepad) {
459 chip->read_buf(mtd, oob, chip->ecc.prepad);
460 oob += chip->ecc.prepad;
466 if (chip->ecc.postpad) {
467 chip->read_buf(mtd, oob, chip->ecc.postpad);
468 oob += chip->ecc.postpad;
487 int n, eccsize = chip->ecc.size;
488 int eccbytes = chip->ecc.bytes;
489 int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
490 int eccsteps = chip->ecc.steps;
507 if (chip->ecc.prepad) {
508 chip->read_buf(mtd, oob, chip->ecc.prepad);
509 oob += chip->ecc.prepad;
512 stat = chip->ecc.correct(mtd, p, oob, NULL);
520 if (chip->ecc.postpad) {
521 chip->read_buf(mtd, oob, chip->ecc.postpad);
522 oob += chip->ecc.postpad;
531 /* Then switch ECC off and read the OOB area to get the ECC code */
534 eccsteps = chip->ecc.steps;
535 oob = chip->oob_poi + chip->ecc.prepad;
539 chip->ecc.prepad;
541 oob += eccbytes + chip->ecc.postpad;
551 int eccpitch = chip->ecc.bytes + chip->ecc.prepad + chip->ecc.postpad;
553 int i, len, status, steps = chip->ecc.steps;
563 host->col_addr += chip->ecc.prepad + chip->ecc.postpad;
579 int eccsize = chip->ecc.size;
580 int eccbytes = chip->ecc.bytes;
581 int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
586 for (n = 0, steps = chip->ecc.steps; steps > 0; n++, steps--) {
593 if (chip->ecc.prepad) {
594 chip->write_buf(mtd, oob, chip->ecc.prepad);
595 oob += chip->ecc.prepad;
601 if (chip->ecc.postpad) {
602 chip->write_buf(mtd, oob, chip->ecc.postpad);
603 oob += chip->ecc.postpad;
619 int i, n, eccsize = chip->ecc.size;
620 int eccbytes = chip->ecc.bytes;
621 int eccpitch = eccbytes + chip->ecc.prepad + chip->ecc.postpad;
622 int eccsteps = chip->ecc.steps;
626 chip->ecc.hwctl(mtd, NAND_ECC_WRITE);
637 if (chip->ecc.prepad) {
638 chip->write_buf(mtd, oob, chip->ecc.prepad);
639 oob += chip->ecc.prepad;
645 if (chip->ecc.postpad) {
646 chip->write_buf(mtd, oob, chip->ecc.postpad);
647 oob += chip->ecc.postpad;
675 "MXC_NAND: HWECC uncorrectable ECC error"
706 * HW ECC, so we need to return failure
711 pr_debug("MXC_NAND: HWECC uncorrectable 2-bit ECC error\n");
1012 * partial write. It always sends out 512+ecc+512+ecc
1181 this->ecc.calculate = mxc_nand_calculate_ecc;
1182 this->ecc.hwctl = mxc_nand_enable_hwecc;
1183 this->ecc.correct = mxc_nand_correct_data;
1185 this->ecc.mode = NAND_ECC_HW_SYNDROME;
1186 this->ecc.read_page = mxc_nand_read_page_syndrome;
1187 this->ecc.read_page_raw = mxc_nand_read_page_raw_syndrome;
1188 this->ecc.read_oob = mxc_nand_read_oob_syndrome;
1189 this->ecc.write_page = mxc_nand_write_page_syndrome;
1190 this->ecc.write_page_raw = mxc_nand_write_page_raw_syndrome;
1191 this->ecc.write_oob = mxc_nand_write_oob_syndrome;
1192 this->ecc.bytes = 9;
1193 this->ecc.prepad = 7;
1195 this->ecc.mode = NAND_ECC_HW;
1199 this->ecc.strength = 1;
1201 this->ecc.strength = 4;
1205 this->ecc.size = 512;
1208 this->ecc.layout = &nand_soft_eccoob;
1209 this->ecc.mode = NAND_ECC_SOFT;
1221 this->ecc.layout = &nand_hw_eccoob2k;
1224 this->ecc.layout = &nand_hw_eccoob;