Lines Matching +full:flip +full:- +full:chip
1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2007-2008
77 * 2-bits 4-bytes 4-bytes
78 * 4-bits 7-bytes 7-bytes
79 * 8-bits 13-bytes 14-bytes
80 * 12-bits 20-bytes 21-bytes
81 * 24-bits 39-bytes 42-bytes
82 * 32-bits 52-bytes 56-bytes
95 layout->eccbytes = ecc_len; in pmecc_config_ecc_layout()
99 layout->eccpos[i] = oobsize - ecc_len + i; in pmecc_config_ecc_layout()
101 layout->oobfree[0].offset = 2; in pmecc_config_ecc_layout()
102 layout->oobfree[0].length = in pmecc_config_ecc_layout()
103 oobsize - ecc_len - layout->oobfree[0].offset; in pmecc_config_ecc_layout()
110 table_size = host->pmecc_sector_size == 512 ? in pmecc_get_alpha_to()
114 return host->pmecc_rom_base + host->pmecc_index_table_offset + in pmecc_get_alpha_to()
120 free(host->pmecc_partial_syn); in pmecc_data_free()
121 free(host->pmecc_si); in pmecc_data_free()
122 free(host->pmecc_lmu); in pmecc_data_free()
123 free(host->pmecc_smu); in pmecc_data_free()
124 free(host->pmecc_mu); in pmecc_data_free()
125 free(host->pmecc_dmu); in pmecc_data_free()
126 free(host->pmecc_delta); in pmecc_data_free()
131 const int cap = host->pmecc_corr_cap; in pmecc_data_alloc()
135 host->pmecc_partial_syn = malloc(size); in pmecc_data_alloc()
136 host->pmecc_si = malloc(size); in pmecc_data_alloc()
137 host->pmecc_lmu = malloc((cap + 1) * sizeof(int16_t)); in pmecc_data_alloc()
138 host->pmecc_smu = malloc((cap + 2) * size); in pmecc_data_alloc()
141 host->pmecc_mu = malloc(size); in pmecc_data_alloc()
142 host->pmecc_dmu = malloc(size); in pmecc_data_alloc()
143 host->pmecc_delta = malloc(size); in pmecc_data_alloc()
145 if (host->pmecc_partial_syn && in pmecc_data_alloc()
146 host->pmecc_si && in pmecc_data_alloc()
147 host->pmecc_lmu && in pmecc_data_alloc()
148 host->pmecc_smu && in pmecc_data_alloc()
149 host->pmecc_mu && in pmecc_data_alloc()
150 host->pmecc_dmu && in pmecc_data_alloc()
151 host->pmecc_delta) in pmecc_data_alloc()
156 return -ENOMEM; in pmecc_data_alloc()
168 for (i = 0; i < host->pmecc_corr_cap; i++) { in pmecc_gen_syndrome()
169 value = pmecc_readl(host->pmecc, rem_port[sector].rem[i / 2]); in pmecc_gen_syndrome()
173 host->pmecc_partial_syn[(2 * i) + 1] = (int16_t)value; in pmecc_gen_syndrome()
181 int16_t __iomem *alpha_to = host->pmecc_alpha_to; in pmecc_substitute()
182 int16_t __iomem *index_of = host->pmecc_index_of; in pmecc_substitute()
183 int16_t *partial_syn = host->pmecc_partial_syn; in pmecc_substitute()
184 const int cap = host->pmecc_corr_cap; in pmecc_substitute()
191 si = host->pmecc_si; in pmecc_substitute()
193 memset(&si[1], 0, sizeof(int16_t) * (2 * cap - 1)); in pmecc_substitute()
198 for (j = 0; j < host->pmecc_degree; j++) { in pmecc_substitute()
211 tmp = (tmp * 2) % host->pmecc_cw_len; in pmecc_substitute()
223 * This function is written according to chip datasheet Chapter:
232 int16_t *lmu = host->pmecc_lmu; in pmecc_get_sigma()
233 int16_t *si = host->pmecc_si; in pmecc_get_sigma()
234 int *mu = host->pmecc_mu; in pmecc_get_sigma()
235 int *dmu = host->pmecc_dmu; /* Discrepancy */ in pmecc_get_sigma()
236 int *delta = host->pmecc_delta; /* Delta order */ in pmecc_get_sigma()
237 int cw_len = host->pmecc_cw_len; in pmecc_get_sigma()
238 const int16_t cap = host->pmecc_corr_cap; in pmecc_get_sigma()
240 int16_t __iomem *index_of = host->pmecc_index_of; in pmecc_get_sigma()
241 int16_t __iomem *alpha_to = host->pmecc_alpha_to; in pmecc_get_sigma()
244 int16_t *smu = host->pmecc_smu; in pmecc_get_sigma()
259 mu[0] = -1; in pmecc_get_sigma()
267 /* delta[0] = (mu[0] * 2 - lmu[0]) >> 1; */ in pmecc_get_sigma()
268 delta[0] = -1; in pmecc_get_sigma()
283 /* delta[1] = (mu[1] * 2 - lmu[1]) >> 1; */ in pmecc_get_sigma()
293 tmp = ((cap - (lmu[i] >> 1) - 1) / 2); in pmecc_get_sigma()
294 if ((cap - (lmu[i] >> 1) - 1) & 0x1) in pmecc_get_sigma()
316 largest = -1; in pmecc_get_sigma()
326 diff = (mu[i] - mu[ro]); in pmecc_get_sigma()
347 tmp = a + (cw_len - b) + c; in pmecc_get_sigma()
358 delta[i + 1] = (mu[i + 1] * 2 - lmu[i + 1]) >> 1; in pmecc_get_sigma()
365 tmp = 2 * (i - 1); in pmecc_get_sigma()
368 } else if (smu[(i + 1) * num + k] && si[tmp + 3 - k]) { in pmecc_get_sigma()
372 b = si[2 * (i - 1) + 3 - k]; in pmecc_get_sigma()
387 const int cap = host->pmecc_corr_cap; in pmecc_err_location()
389 int sector_size = host->pmecc_sector_size; in pmecc_err_location()
394 int16_t *smu = host->pmecc_smu; in pmecc_err_location()
397 pmecc_writel(host->pmerrloc, eldis, PMERRLOC_DISABLE); in pmecc_err_location()
399 for (i = 0; i <= host->pmecc_lmu[cap + 1] >> 1; i++) { in pmecc_err_location()
400 pmecc_writel(host->pmerrloc, sigma[i], in pmecc_err_location()
405 val = PMERRLOC_ELCFG_NUM_ERRORS(err_nbr - 1); in pmecc_err_location()
409 pmecc_writel(host->pmerrloc, elcfg, val); in pmecc_err_location()
410 pmecc_writel(host->pmerrloc, elen, in pmecc_err_location()
411 sector_size * 8 + host->pmecc_degree * cap); in pmecc_err_location()
413 while (--timeout) { in pmecc_err_location()
414 if (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_CALC_DONE) in pmecc_err_location()
421 dev_err(host->dev, "atmel_nand : Timeout to calculate PMECC error location\n"); in pmecc_err_location()
422 return -1; in pmecc_err_location()
425 roots_nbr = (pmecc_readl(host->pmerrloc, elisr) & PMERRLOC_ERR_NUM_MASK) in pmecc_err_location()
428 if (roots_nbr == host->pmecc_lmu[cap + 1] >> 1) in pmecc_err_location()
429 return err_nbr - 1; in pmecc_err_location()
433 return -1; in pmecc_err_location()
446 sector_size = host->pmecc_sector_size; in pmecc_correct_data()
449 tmp = pmecc_readl(host->pmerrloc, el[i]) - 1; in pmecc_correct_data()
460 pos = sector_num * host->pmecc_sector_size + byte_pos; in pmecc_correct_data()
461 dev_dbg(host->dev, "Bit flip in data area, byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", in pmecc_correct_data()
464 /* Bit flip in OOB area */ in pmecc_correct_data()
465 tmp = sector_num * host->pmecc_bytes_per_sector in pmecc_correct_data()
466 + (byte_pos - sector_size); in pmecc_correct_data()
470 pos = tmp + nand_chip->ecc.layout->eccpos[0]; in pmecc_correct_data()
471 dev_dbg(host->dev, "Bit flip in OOB, oob_byte_pos: %d, bit_pos: %d, 0x%02x -> 0x%02x\n", in pmecc_correct_data()
476 err_nbr--; in pmecc_correct_data()
491 if (host->pmecc_version >= PMECC_VERSION_SAMA5D4) in pmecc_correction()
494 eccbytes = nand_chip->ecc.bytes; in pmecc_correction()
502 for (i = 0; i < host->pmecc_sector_number; i++) { in pmecc_correction()
505 buf_pos = buf + i * host->pmecc_sector_size; in pmecc_correction()
512 if (err_nbr == -1) { in pmecc_correction()
513 dev_err(host->dev, "PMECC: Too many errors\n"); in pmecc_correction()
514 mtd->ecc_stats.failed++; in pmecc_correction()
515 return -EBADMSG; in pmecc_correction()
518 host->pmecc_bytes_per_sector, err_nbr); in pmecc_correction()
519 mtd->ecc_stats.corrected += err_nbr; in pmecc_correction()
529 struct nand_chip *chip, uint8_t *buf, int oob_required, int page) in atmel_nand_pmecc_read_page() argument
531 struct atmel_nand_host *host = nand_get_controller_data(chip); in atmel_nand_pmecc_read_page()
532 int eccsize = chip->ecc.size; in atmel_nand_pmecc_read_page()
533 uint8_t *oob = chip->oob_poi; in atmel_nand_pmecc_read_page()
534 uint32_t *eccpos = chip->ecc.layout->eccpos; in atmel_nand_pmecc_read_page()
538 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_RST); in atmel_nand_pmecc_read_page()
539 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_DISABLE); in atmel_nand_pmecc_read_page()
540 pmecc_writel(host->pmecc, cfg, ((pmecc_readl(host->pmecc, cfg)) in atmel_nand_pmecc_read_page()
543 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_ENABLE); in atmel_nand_pmecc_read_page()
544 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_DATA); in atmel_nand_pmecc_read_page()
546 chip->read_buf(mtd, buf, eccsize); in atmel_nand_pmecc_read_page()
547 chip->read_buf(mtd, oob, mtd->oobsize); in atmel_nand_pmecc_read_page()
549 while (--timeout) { in atmel_nand_pmecc_read_page()
550 if (!(pmecc_readl(host->pmecc, sr) & PMECC_SR_BUSY)) in atmel_nand_pmecc_read_page()
557 dev_err(host->dev, "atmel_nand : Timeout to read PMECC page\n"); in atmel_nand_pmecc_read_page()
558 return -1; in atmel_nand_pmecc_read_page()
561 stat = pmecc_readl(host->pmecc, isr); in atmel_nand_pmecc_read_page()
564 return -EBADMSG; in atmel_nand_pmecc_read_page()
570 struct nand_chip *chip, const uint8_t *buf, in atmel_nand_pmecc_write_page() argument
573 struct atmel_nand_host *host = nand_get_controller_data(chip); in atmel_nand_pmecc_write_page()
574 uint32_t *eccpos = chip->ecc.layout->eccpos; in atmel_nand_pmecc_write_page()
578 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_RST); in atmel_nand_pmecc_write_page()
579 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_DISABLE); in atmel_nand_pmecc_write_page()
581 pmecc_writel(host->pmecc, cfg, (pmecc_readl(host->pmecc, cfg) | in atmel_nand_pmecc_write_page()
584 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_ENABLE); in atmel_nand_pmecc_write_page()
585 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_DATA); in atmel_nand_pmecc_write_page()
587 chip->write_buf(mtd, (u8 *)buf, mtd->writesize); in atmel_nand_pmecc_write_page()
589 while (--timeout) { in atmel_nand_pmecc_write_page()
590 if (!(pmecc_readl(host->pmecc, sr) & PMECC_SR_BUSY)) in atmel_nand_pmecc_write_page()
597 dev_err(host->dev, "atmel_nand : Timeout to read PMECC status, fail to write PMECC in oob\n"); in atmel_nand_pmecc_write_page()
601 for (i = 0; i < host->pmecc_sector_number; i++) { in atmel_nand_pmecc_write_page()
602 for (j = 0; j < host->pmecc_bytes_per_sector; j++) { in atmel_nand_pmecc_write_page()
605 pos = i * host->pmecc_bytes_per_sector + j; in atmel_nand_pmecc_write_page()
606 chip->oob_poi[eccpos[pos]] = in atmel_nand_pmecc_write_page()
607 pmecc_readb(host->pmecc, ecc_port[i].ecc[j]); in atmel_nand_pmecc_write_page()
610 chip->write_buf(mtd, chip->oob_poi, mtd->oobsize); in atmel_nand_pmecc_write_page()
622 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_RST); in atmel_pmecc_core_init()
623 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_DISABLE); in atmel_pmecc_core_init()
625 switch (host->pmecc_corr_cap) { in atmel_pmecc_core_init()
646 if (host->pmecc_sector_size == 512) in atmel_pmecc_core_init()
648 else if (host->pmecc_sector_size == 1024) in atmel_pmecc_core_init()
651 switch (host->pmecc_sector_number) { in atmel_pmecc_core_init()
668 pmecc_writel(host->pmecc, cfg, val); in atmel_pmecc_core_init()
670 ecc_layout = nand_chip->ecc.layout; in atmel_pmecc_core_init()
671 pmecc_writel(host->pmecc, sarea, mtd->oobsize - 1); in atmel_pmecc_core_init()
672 pmecc_writel(host->pmecc, saddr, ecc_layout->eccpos[0]); in atmel_pmecc_core_init()
673 pmecc_writel(host->pmecc, eaddr, in atmel_pmecc_core_init()
674 ecc_layout->eccpos[ecc_layout->eccbytes - 1]); in atmel_pmecc_core_init()
676 pmecc_writel(host->pmecc, clk, PMECC_CLK_133MHZ); in atmel_pmecc_core_init()
677 pmecc_writel(host->pmecc, idr, 0xff); in atmel_pmecc_core_init()
678 pmecc_writel(host->pmecc, ctrl, PMECC_CTRL_ENABLE); in atmel_pmecc_core_init()
683 * pmecc_choose_ecc - Get ecc requirement from ONFI parameters. If
687 * if host->pmecc_corr_cap is 0 then set it as the ONFI ecc_bits.
688 * if host->pmecc_sector_size is 0 then set it as the ONFI sector_size.
689 * @chip: point to an nand_chip structure.
696 struct nand_chip *chip, in pmecc_choose_ecc() argument
701 if (chip->onfi_version) { in pmecc_choose_ecc()
702 *cap = chip->ecc_strength_ds; in pmecc_choose_ecc()
703 *sector_size = chip->ecc_step_ds; in pmecc_choose_ecc()
709 /* Non-ONFI compliant */ in pmecc_choose_ecc()
710 dev_info(host->dev, "NAND chip is not ONFI compliant, assume ecc_bits is 2 in 512 bytes\n"); in pmecc_choose_ecc()
716 if (host->pmecc_corr_cap == 0) { in pmecc_choose_ecc()
719 host->pmecc_corr_cap = 2; in pmecc_choose_ecc()
721 host->pmecc_corr_cap = 4; in pmecc_choose_ecc()
723 host->pmecc_corr_cap = 8; in pmecc_choose_ecc()
725 host->pmecc_corr_cap = 12; in pmecc_choose_ecc()
727 host->pmecc_corr_cap = 24; in pmecc_choose_ecc()
730 host->pmecc_corr_cap = 32; in pmecc_choose_ecc()
732 host->pmecc_corr_cap = 24; in pmecc_choose_ecc()
735 if (host->pmecc_sector_size == 0) { in pmecc_choose_ecc()
738 host->pmecc_sector_size = 1024; in pmecc_choose_ecc()
740 host->pmecc_sector_size = 512; in pmecc_choose_ecc()
742 return -EINVAL; in pmecc_choose_ecc()
752 /* polynomial degree is the most-significant bit index */ in deg()
753 return fls(poly) - 1; in deg()
761 unsigned int nn = (1 << mm) - 1; in build_gf_tables()
765 return -EINVAL; in build_gf_tables()
771 /* polynomial is not primitive (a^i=1 with 0<i<2^m-1) */ in build_gf_tables()
772 return -EINVAL; in build_gf_tables()
813 nand->ecc.mode = NAND_ECC_HW; in atmel_pmecc_nand_init_params()
814 nand->ecc.calculate = NULL; in atmel_pmecc_nand_init_params()
815 nand->ecc.correct = NULL; in atmel_pmecc_nand_init_params()
816 nand->ecc.hwctl = NULL; in atmel_pmecc_nand_init_params()
819 host->pmecc_corr_cap = host->pmecc_sector_size = 0; in atmel_pmecc_nand_init_params()
822 host->pmecc_corr_cap = CONFIG_PMECC_CAP; in atmel_pmecc_nand_init_params()
825 host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE; in atmel_pmecc_nand_init_params()
832 dev_err(host->dev, "Required ECC %d bits in %d bytes not supported!\n", in atmel_pmecc_nand_init_params()
834 return -EINVAL; in atmel_pmecc_nand_init_params()
837 if (cap > host->pmecc_corr_cap) in atmel_pmecc_nand_init_params()
838 …dev_info(host->dev, "WARNING: Using different ecc correct bits(%d bit) from Nand ONFI ECC reqireme… in atmel_pmecc_nand_init_params()
839 host->pmecc_corr_cap, cap); in atmel_pmecc_nand_init_params()
840 if (sector_size < host->pmecc_sector_size) in atmel_pmecc_nand_init_params()
841 …dev_info(host->dev, "WARNING: Using different ecc correct sector size (%d bytes) from Nand ONFI EC… in atmel_pmecc_nand_init_params()
842 host->pmecc_sector_size, sector_size); in atmel_pmecc_nand_init_params()
844 host->pmecc_corr_cap = CONFIG_PMECC_CAP; in atmel_pmecc_nand_init_params()
845 host->pmecc_sector_size = CONFIG_PMECC_SECTOR_SIZE; in atmel_pmecc_nand_init_params()
848 cap = host->pmecc_corr_cap; in atmel_pmecc_nand_init_params()
849 sector_size = host->pmecc_sector_size; in atmel_pmecc_nand_init_params()
857 host->pmecc_index_table_offset = 0; in atmel_pmecc_nand_init_params()
859 if (host->pmecc_sector_size == 512) in atmel_pmecc_nand_init_params()
860 host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_512; in atmel_pmecc_nand_init_params()
862 host->pmecc_index_table_offset = ATMEL_PMECC_INDEX_OFFSET_1024; in atmel_pmecc_nand_init_params()
868 host->pmecc = (struct pmecc_regs __iomem *) ATMEL_BASE_PMECC; in atmel_pmecc_nand_init_params()
869 host->pmerrloc = (struct pmecc_errloc_regs __iomem *) in atmel_pmecc_nand_init_params()
872 pmecc_galois_table = create_lookup_table(host->pmecc_sector_size); in atmel_pmecc_nand_init_params()
874 dev_err(host->dev, "out of memory\n"); in atmel_pmecc_nand_init_params()
875 return -ENOMEM; in atmel_pmecc_nand_init_params()
878 host->pmecc_rom_base = (void __iomem *)pmecc_galois_table; in atmel_pmecc_nand_init_params()
880 host->pmecc_rom_base = (void __iomem *) ATMEL_BASE_ROM; in atmel_pmecc_nand_init_params()
884 nand->ecc.size = mtd->writesize; in atmel_pmecc_nand_init_params()
887 switch (mtd->writesize) { in atmel_pmecc_nand_init_params()
891 host->pmecc_degree = (sector_size == 512) ? in atmel_pmecc_nand_init_params()
893 host->pmecc_cw_len = (1 << host->pmecc_degree) - 1; in atmel_pmecc_nand_init_params()
894 host->pmecc_sector_number = mtd->writesize / sector_size; in atmel_pmecc_nand_init_params()
895 host->pmecc_bytes_per_sector = pmecc_get_ecc_bytes( in atmel_pmecc_nand_init_params()
897 host->pmecc_alpha_to = pmecc_get_alpha_to(host); in atmel_pmecc_nand_init_params()
898 host->pmecc_index_of = host->pmecc_rom_base + in atmel_pmecc_nand_init_params()
899 host->pmecc_index_table_offset; in atmel_pmecc_nand_init_params()
901 nand->ecc.steps = 1; in atmel_pmecc_nand_init_params()
902 nand->ecc.bytes = host->pmecc_bytes_per_sector * in atmel_pmecc_nand_init_params()
903 host->pmecc_sector_number; in atmel_pmecc_nand_init_params()
905 if (nand->ecc.bytes > MTD_MAX_ECCPOS_ENTRIES_LARGE) { in atmel_pmecc_nand_init_params()
906 dev_err(host->dev, "too large eccpos entries. max support ecc.bytes is %d\n", in atmel_pmecc_nand_init_params()
908 return -EINVAL; in atmel_pmecc_nand_init_params()
911 if (nand->ecc.bytes > mtd->oobsize - PMECC_OOB_RESERVED_BYTES) { in atmel_pmecc_nand_init_params()
912 dev_err(host->dev, "No room for ECC bytes\n"); in atmel_pmecc_nand_init_params()
913 return -EINVAL; in atmel_pmecc_nand_init_params()
916 mtd->oobsize, in atmel_pmecc_nand_init_params()
917 nand->ecc.bytes); in atmel_pmecc_nand_init_params()
918 nand->ecc.layout = &atmel_pmecc_oobinfo; in atmel_pmecc_nand_init_params()
923 dev_err(host->dev, "Unsupported page size for PMECC, use Software ECC\n"); in atmel_pmecc_nand_init_params()
927 nand->ecc.mode = NAND_ECC_SOFT; in atmel_pmecc_nand_init_params()
928 nand->ecc.read_page = NULL; in atmel_pmecc_nand_init_params()
929 nand->ecc.postpad = 0; in atmel_pmecc_nand_init_params()
930 nand->ecc.prepad = 0; in atmel_pmecc_nand_init_params()
931 nand->ecc.bytes = 0; in atmel_pmecc_nand_init_params()
937 dev_err(host->dev, "Cannot allocate memory for PMECC computation!\n"); in atmel_pmecc_nand_init_params()
938 return -ENOMEM; in atmel_pmecc_nand_init_params()
941 nand->options |= NAND_NO_SUBPAGE_WRITE; in atmel_pmecc_nand_init_params()
942 nand->ecc.read_page = atmel_nand_pmecc_read_page; in atmel_pmecc_nand_init_params()
943 nand->ecc.write_page = atmel_nand_pmecc_write_page; in atmel_pmecc_nand_init_params()
944 nand->ecc.strength = cap; in atmel_pmecc_nand_init_params()
947 host->pmecc_version = pmecc_readl(host->pmerrloc, version); in atmel_pmecc_nand_init_params()
948 dev_dbg(host->dev, "PMECC IP version is: %x\n", host->pmecc_version); in atmel_pmecc_nand_init_params()
1016 * chip: nand chip info structure
1018 * oob_required: caller expects OOB data read to chip->oob_poi
1020 static int atmel_nand_read_page(struct mtd_info *mtd, struct nand_chip *chip, in atmel_nand_read_page() argument
1023 int eccsize = chip->ecc.size; in atmel_nand_read_page()
1024 int eccbytes = chip->ecc.bytes; in atmel_nand_read_page()
1025 uint32_t *eccpos = chip->ecc.layout->eccpos; in atmel_nand_read_page()
1027 uint8_t *oob = chip->oob_poi; in atmel_nand_read_page()
1032 chip->read_buf(mtd, p, eccsize); in atmel_nand_read_page()
1042 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, in atmel_nand_read_page()
1043 mtd->writesize + eccpos[0], -1); in atmel_nand_read_page()
1048 chip->read_buf(mtd, ecc_pos, eccbytes); in atmel_nand_read_page()
1051 stat = chip->ecc.correct(mtd, p, oob, NULL); in atmel_nand_read_page()
1054 mtd->ecc_stats.failed++; in atmel_nand_read_page()
1056 mtd->ecc_stats.corrected += stat; in atmel_nand_read_page()
1059 chip->cmdfunc(mtd, NAND_CMD_RNDOUT, mtd->writesize, -1); in atmel_nand_read_page()
1062 chip->read_buf(mtd, oob, mtd->oobsize); in atmel_nand_read_page()
1073 * dat: raw data read from the chip
1074 * read_ecc: ECC from the chip (unused)
1111 dev_warn(host->dev, "atmel_nand : multiple errors detected." in atmel_nand_correct()
1113 return -EBADMSG; in atmel_nand_correct()
1121 dev_warn(host->dev, "atmel_nand : one bit error on ECC code." in atmel_nand_correct()
1126 dev_warn(host->dev, "atmel_nand : one bit error on data." in atmel_nand_correct()
1131 if (nand_chip->options & NAND_BUSWIDTH_16) { in atmel_nand_correct()
1138 dev_warn(host->dev, "atmel_nand : error corrected\n"); in atmel_nand_correct()
1151 nand->ecc.mode = NAND_ECC_HW; in atmel_hwecc_nand_init_param()
1152 nand->ecc.calculate = atmel_nand_calculate; in atmel_hwecc_nand_init_param()
1153 nand->ecc.correct = atmel_nand_correct; in atmel_hwecc_nand_init_param()
1154 nand->ecc.hwctl = atmel_nand_hwctl; in atmel_hwecc_nand_init_param()
1155 nand->ecc.read_page = atmel_nand_read_page; in atmel_hwecc_nand_init_param()
1156 nand->ecc.bytes = 4; in atmel_hwecc_nand_init_param()
1157 nand->ecc.strength = 4; in atmel_hwecc_nand_init_param()
1159 if (nand->ecc.mode == NAND_ECC_HW) { in atmel_hwecc_nand_init_param()
1161 nand->ecc.size = mtd->writesize; in atmel_hwecc_nand_init_param()
1164 switch (mtd->writesize) { in atmel_hwecc_nand_init_param()
1166 nand->ecc.layout = &atmel_oobinfo_small; in atmel_hwecc_nand_init_param()
1171 nand->ecc.layout = &atmel_oobinfo_large; in atmel_hwecc_nand_init_param()
1176 nand->ecc.layout = &atmel_oobinfo_large; in atmel_hwecc_nand_init_param()
1181 nand->ecc.layout = &atmel_oobinfo_large; in atmel_hwecc_nand_init_param()
1188 nand->ecc.mode = NAND_ECC_SOFT; in atmel_hwecc_nand_init_param()
1189 nand->ecc.calculate = NULL; in atmel_hwecc_nand_init_param()
1190 nand->ecc.correct = NULL; in atmel_hwecc_nand_init_param()
1191 nand->ecc.hwctl = NULL; in atmel_hwecc_nand_init_param()
1192 nand->ecc.read_page = NULL; in atmel_hwecc_nand_init_param()
1193 nand->ecc.postpad = 0; in atmel_hwecc_nand_init_param()
1194 nand->ecc.prepad = 0; in atmel_hwecc_nand_init_param()
1195 nand->ecc.bytes = 0; in atmel_hwecc_nand_init_param()
1213 ulong IO_ADDR_W = (ulong) this->IO_ADDR_W; in at91_nand_hwcontrol()
1226 this->IO_ADDR_W = (void *) IO_ADDR_W; in at91_nand_hwcontrol()
1230 writeb(cmd, this->IO_ADDR_W); in at91_nand_hwcontrol()
1250 unsigned int ctrl) = this->cmd_ctrl; in nand_command()
1252 while (!this->dev_ready(mtd)) in nand_command()
1262 if ((this->options & NAND_BUSWIDTH_16) && !nand_opcode_8bits(cmd)) in nand_command()
1277 while (!this->dev_ready(mtd)) in nand_command()
1289 if (this->options & NAND_BUSWIDTH_16) { in nand_is_bad_block()
1290 if (readw(this->IO_ADDR_R) != 0xffff) in nand_is_bad_block()
1293 if (readb(this->IO_ADDR_R) != 0xff) in nand_is_bad_block()
1319 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) { in nand_read_page()
1320 if (this->ecc.mode != NAND_ECC_SOFT) in nand_read_page()
1321 this->ecc.hwctl(mtd, NAND_ECC_READ); in nand_read_page()
1322 this->read_buf(mtd, p, eccsize); in nand_read_page()
1323 this->ecc.calculate(mtd, p, &ecc_calc[i]); in nand_read_page()
1325 this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE); in nand_read_page()
1333 for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) in nand_read_page()
1334 this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]); in nand_read_page()
1343 unsigned int ctrl) = this->cmd_ctrl; in spl_nand_erase_one()
1362 while (!this->dev_ready(mtd)) in spl_nand_erase_one()
1385 udelay(this->chip_delay); in at91_nand_wait_ready()
1394 nand->ecc.mode = NAND_ECC_SOFT; in board_nand_init()
1396 nand->options = NAND_BUSWIDTH_16; in board_nand_init()
1397 nand->read_buf = nand_read_buf16; in board_nand_init()
1399 nand->read_buf = nand_read_buf; in board_nand_init()
1401 nand->cmd_ctrl = at91_nand_hwcontrol; in board_nand_init()
1403 nand->dev_ready = at91_nand_ready; in board_nand_init()
1405 nand->dev_ready = at91_nand_wait_ready; in board_nand_init()
1407 nand->chip_delay = 20; in board_nand_init()
1409 nand->bbt_options |= NAND_BBT_USE_FLASH; in board_nand_init()
1424 mtd->writesize = CONFIG_SYS_NAND_PAGE_SIZE; in nand_init()
1425 mtd->oobsize = CONFIG_SYS_NAND_OOBSIZE; in nand_init()
1444 nand_chip.select_chip(mtd, -1); in nand_deselect()
1463 nand->IO_ADDR_R = nand->IO_ADDR_W = (void __iomem *)base_addr; in atmel_nand_chip_init()
1466 nand->ecc.mode = NAND_ECC_SOFT_BCH; in atmel_nand_chip_init()
1468 nand->ecc.mode = NAND_ECC_SOFT; in atmel_nand_chip_init()
1471 nand->options = NAND_BUSWIDTH_16; in atmel_nand_chip_init()
1473 nand->cmd_ctrl = at91_nand_hwcontrol; in atmel_nand_chip_init()
1475 nand->dev_ready = at91_nand_ready; in atmel_nand_chip_init()
1477 nand->chip_delay = 75; in atmel_nand_chip_init()
1479 nand->bbt_options |= NAND_BBT_USE_FLASH; in atmel_nand_chip_init()
1508 dev_err(host->dev, "atmel_nand: Fail to initialize #%d chip", in board_nand_init()