Lines Matching full:ecc

15 	  Omit standard ECC layouts to safe space. Select this if your driver
16 	  is known to provide its own ECC layout.
28 	bool "Atmel Hardware ECC"
32 	bool "Atmel Programmable Multibit ECC (PMECC)"
36 	  The Programmable Multibit ECC (PMECC) controller is a programmable
40 	int "PMECC Correctable ECC Bits"
44 	  Correctable ECC bits, can be 2, 4, 8, 12, and 24.
59 	  Generate Programmable Multibit ECC (PMECC) header for SPL image.
88 	  of OOB area before last ECC sector data starts.  This is potentially
102 	  do ECC calculation (not ECC error detection) for HAM1, BCH4, BCH8
103 	  and BCH16 ECC algorithms.
118 	  ELM controller is used for ECC error detection (not ECC calculation)
119 	  of BCH4, BCH8 and BCH16 ECC algorithms.
121 	  thus such SoC platforms need to depend on software library for ECC error
122 	  detection. However ECC calculation on such plaforms would still be
134 	  currently does not support hardware ECC.
146 	prompt "Hardware ECC strength"
150 	  Select the ECC strength used in the hardware BCH ECC block.
153 	bool "24-error correction (45 ECC bytes)"
156 	bool "32-error correction (60 ECC bytes)"
187 	int "Allwinner NAND SPL ECC Strength"
191 	int "Allwinner NAND SPL ECC Step Size"
206 	  controller. This uses the hardware ECC for read and
239 	bool "Use minimum ECC strength supported by the controller"
340 	  Hardware ECC correction. This is useful for platforms which have ELM
344           SPL-NAND driver with software ECC correction support.