Lines Matching +full:0 +full:x01000

23 #define AM29DL800BB	0x22CB
24 #define AM29DL800BT 0x224A
26 #define AM29F400BB 0x22AB
27 #define AM29F800BB 0x2258
28 #define AM29F800BT 0x22D6
29 #define AM29LV400BB 0x22BA
30 #define AM29LV400BT 0x22B9
31 #define AM29LV800BB 0x225B
32 #define AM29LV800BT 0x22DA
33 #define AM29LV160DT 0x22C4
34 #define AM29LV160DB 0x2249
35 #define AM29F017D 0x003D
36 #define AM29F016D 0x00AD
37 #define AM29F080 0x00D5
38 #define AM29F040 0x00A4
39 #define AM29LV040B 0x004F
40 #define AM29F032B 0x0041
41 #define AM29F002T 0x00B0
44 #define SST39LF800 0x2781
45 #define SST39LF160 0x2782
46 #define SST39VF1601 0x234b
47 #define SST39LF512 0x00D4
48 #define SST39LF010 0x00D5
49 #define SST39LF020 0x00D6
50 #define SST39LF040 0x00D7
51 #define SST39SF010A 0x00B5
52 #define SST39SF020A 0x00B6
55 #define STM29F400BB 0x00D6
58 #define MX29LV040 0x004F
61 #define W39L040A 0x00D6
64 #define A29L040 0x0092
67 #define EN29LV040A 0x004F
74 * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
79 MTD_UADDR_NOT_SUPPORTED = 0, /* data width not supported */
99 * initializers have extra fields initialized to 0. It is _very_
102 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
107 .addr1 = 0xffff,
108 .addr2 = 0xffff
112 .addr1 = 0x0555,
113 .addr2 = 0x02aa
117 .addr1 = 0x0555,
118 .addr2 = 0x0aaa
122 .addr1 = 0x5555,
123 .addr2 = 0x2aaa
127 .addr1 = 0x0AAA,
128 .addr2 = 0x0555
132 .addr1 = 0x0000, /* Doesn't matter which address */
133 .addr2 = 0x0000 /* is used - must be last entry */
137 .addr1 = 0x0000,
138 .addr2 = 0x0000
172 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
178 ERASEINFO(0x01000,64),
188 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
194 ERASEINFO(0x10000,8),
202 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
208 ERASEINFO(0x01000,128),
216 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
222 ERASEINFO(0x10000,8),
230 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
236 ERASEINFO(0x10000, 8),
244 [0] = MTD_UADDR_0x5555_0x2AAA /* x8 */
250 ERASEINFO(0x10000, 8),
258 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
264 ERASEINFO(0x10000, 8),
272 [0] = MTD_UADDR_0x0555_0x02AA /* x8 */
278 ERASEINFO(0x10000, 8),
294 ERASEINFO(0x04000, 1),
295 ERASEINFO(0x02000, 2),
296 ERASEINFO(0x08000, 1),
297 ERASEINFO(0x10000, 7),
311 ERASEINFO(0x04000,1),
312 ERASEINFO(0x02000,2),
313 ERASEINFO(0x08000,1),
314 ERASEINFO(0x10000,7),
328 ERASEINFO(0x04000, 1),
329 ERASEINFO(0x02000, 2),
330 ERASEINFO(0x08000, 1),
331 ERASEINFO(0x10000, 15),
345 ERASEINFO(0x10000, 15),
346 ERASEINFO(0x08000, 1),
347 ERASEINFO(0x02000, 2),
348 ERASEINFO(0x04000, 1),
362 ERASEINFO(0x10000, 15),
363 ERASEINFO(0x08000, 1),
364 ERASEINFO(0x02000, 2),
365 ERASEINFO(0x04000, 1),
379 ERASEINFO(0x10000, 15),
380 ERASEINFO(0x08000, 1),
381 ERASEINFO(0x02000, 2),
382 ERASEINFO(0x04000, 1),
396 ERASEINFO(0x04000, 1),
397 ERASEINFO(0x02000, 2),
398 ERASEINFO(0x08000, 1),
399 ERASEINFO(0x10000, 7),
430 uaddr_idx = jedec_entry->uaddr[0]; in fill_info()
446 debug("unlock addresses are 0x%lx/0x%lx\n", in fill_info()
449 sect_cnt = 0; in fill_info()
450 total_size = 0; in fill_info()
451 for (i = 0; i < jedec_entry->NumEraseRegions; i++) { in fill_info()
453 ulong erase_region_count = (jedec_entry->regions[i] & 0xff) + 1; in fill_info()
458 for (j = 0; j < erase_region_count; j++) { in fill_info()
477 int ret = 0; in jedec_flash_match()
479 ulong mask = 0xFFFF; in jedec_flash_match()
481 mask = 0xFF; in jedec_flash_match()
483 for (i = 0; i < ARRAY_SIZE(jedec_table); i++) { in jedec_flash_match()