Lines Matching +full:dev +full:- +full:ctrl
1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2013 - 2015 Xilinx, Inc.
75 dev_err(mmc_dev(host->mmc), in arasan_zynqmp_dll_reset()
79 timeout--; in arasan_zynqmp_dll_reset()
91 u32 ctrl; in arasan_sdhci_execute_tuning() local
93 struct arasan_sdhci_priv *priv = dev_get_priv(mmc->dev); in arasan_sdhci_execute_tuning()
99 host = priv->host; in arasan_sdhci_execute_tuning()
100 deviceid = priv->deviceid; in arasan_sdhci_execute_tuning()
102 ctrl = sdhci_readw(host, SDHCI_HOST_CTRL2); in arasan_sdhci_execute_tuning()
103 ctrl |= SDHCI_CTRL_EXEC_TUNING; in arasan_sdhci_execute_tuning()
104 sdhci_writew(host, ctrl, SDHCI_HOST_CTRL2); in arasan_sdhci_execute_tuning()
122 if (tuning_loop_counter-- == 0) in arasan_sdhci_execute_tuning()
126 mmc->bus_width == 8) in arasan_sdhci_execute_tuning()
136 ctrl = sdhci_readw(host, SDHCI_HOST_CTRL2); in arasan_sdhci_execute_tuning()
141 } while (ctrl & SDHCI_CTRL_EXEC_TUNING); in arasan_sdhci_execute_tuning()
144 ctrl &= ~SDHCI_CTRL_TUNED_CLK; in arasan_sdhci_execute_tuning()
145 sdhci_writel(host, ctrl, SDHCI_HOST_CTRL2); in arasan_sdhci_execute_tuning()
148 if (!(ctrl & SDHCI_CTRL_TUNED_CLK)) { in arasan_sdhci_execute_tuning()
150 return -1; in arasan_sdhci_execute_tuning()
167 struct arasan_sdhci_priv *priv = dev_get_priv(host->mmc->dev); in arasan_sdhci_set_tapdelay()
168 struct mmc *mmc = (struct mmc *)host->mmc; in arasan_sdhci_set_tapdelay()
171 uhsmode = mode2timing[mmc->selected_mode]; in arasan_sdhci_set_tapdelay()
174 arasan_zynqmp_set_tapdelay(priv->deviceid, uhsmode, in arasan_sdhci_set_tapdelay()
175 priv->bank); in arasan_sdhci_set_tapdelay()
180 struct mmc *mmc = (struct mmc *)host->mmc; in arasan_sdhci_set_control_reg()
186 if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) { in arasan_sdhci_set_control_reg()
192 if (mmc->selected_mode > SD_HS && in arasan_sdhci_set_control_reg()
193 mmc->selected_mode <= UHS_DDR50) { in arasan_sdhci_set_control_reg()
196 switch (mmc->selected_mode) { in arasan_sdhci_set_control_reg()
228 static int arasan_sdhci_probe(struct udevice *dev) in arasan_sdhci_probe() argument
230 struct arasan_sdhci_plat *plat = dev_get_platdata(dev); in arasan_sdhci_probe()
231 struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); in arasan_sdhci_probe()
232 struct arasan_sdhci_priv *priv = dev_get_priv(dev); in arasan_sdhci_probe()
238 host = priv->host; in arasan_sdhci_probe()
240 ret = clk_get_by_index(dev, 0, &clk); in arasan_sdhci_probe()
242 dev_err(dev, "failed to get clock\n"); in arasan_sdhci_probe()
248 dev_err(dev, "failed to get rate\n"); in arasan_sdhci_probe()
255 if (ret && ret != -ENOSYS) { in arasan_sdhci_probe()
256 dev_err(dev, "failed to enable clock\n"); in arasan_sdhci_probe()
260 host->quirks = SDHCI_QUIRK_WAIT_SEND_CMD | in arasan_sdhci_probe()
264 host->quirks |= SDHCI_QUIRK_BROKEN_HISPD_MODE; in arasan_sdhci_probe()
267 if (priv->no_1p8) in arasan_sdhci_probe()
268 host->quirks |= SDHCI_QUIRK_NO_1_8_V; in arasan_sdhci_probe()
270 host->max_clk = clock; in arasan_sdhci_probe()
272 ret = sdhci_setup_cfg(&plat->cfg, host, plat->f_max, in arasan_sdhci_probe()
274 host->mmc = &plat->mmc; in arasan_sdhci_probe()
277 host->mmc->priv = host; in arasan_sdhci_probe()
278 host->mmc->dev = dev; in arasan_sdhci_probe()
279 upriv->mmc = host->mmc; in arasan_sdhci_probe()
281 return sdhci_probe(dev); in arasan_sdhci_probe()
284 static int arasan_sdhci_ofdata_to_platdata(struct udevice *dev) in arasan_sdhci_ofdata_to_platdata() argument
286 struct arasan_sdhci_plat *plat = dev_get_platdata(dev); in arasan_sdhci_ofdata_to_platdata()
287 struct arasan_sdhci_priv *priv = dev_get_priv(dev); in arasan_sdhci_ofdata_to_platdata()
289 priv->host = calloc(1, sizeof(struct sdhci_host)); in arasan_sdhci_ofdata_to_platdata()
290 if (!priv->host) in arasan_sdhci_ofdata_to_platdata()
291 return -1; in arasan_sdhci_ofdata_to_platdata()
293 priv->host->name = dev->name; in arasan_sdhci_ofdata_to_platdata()
296 priv->host->ops = &arasan_ops; in arasan_sdhci_ofdata_to_platdata()
299 priv->host->ioaddr = (void *)dev_read_addr(dev); in arasan_sdhci_ofdata_to_platdata()
300 if (IS_ERR(priv->host->ioaddr)) in arasan_sdhci_ofdata_to_platdata()
301 return PTR_ERR(priv->host->ioaddr); in arasan_sdhci_ofdata_to_platdata()
303 priv->deviceid = dev_read_u32_default(dev, "xlnx,device_id", -1); in arasan_sdhci_ofdata_to_platdata()
304 priv->bank = dev_read_u32_default(dev, "xlnx,mio_bank", -1); in arasan_sdhci_ofdata_to_platdata()
305 priv->no_1p8 = dev_read_bool(dev, "no-1-8-v"); in arasan_sdhci_ofdata_to_platdata()
307 plat->f_max = dev_read_u32_default(dev, "max-frequency", in arasan_sdhci_ofdata_to_platdata()
312 static int arasan_sdhci_bind(struct udevice *dev) in arasan_sdhci_bind() argument
314 struct arasan_sdhci_plat *plat = dev_get_platdata(dev); in arasan_sdhci_bind()
316 return sdhci_bind(dev, &plat->mmc, &plat->cfg); in arasan_sdhci_bind()
320 { .compatible = "arasan,sdhci-8.9a" },