123 	u8 timing;  member
141 	if ((priv->timing == MMC_TIMING_UHS_SDR50) ||  in xenon_mmc_phy_init()
142 	    (priv->timing == MMC_TIMING_UHS_SDR25) ||  in xenon_mmc_phy_init()
143 	    (priv->timing == MMC_TIMING_UHS_SDR12) ||  in xenon_mmc_phy_init()
144 	    (priv->timing == MMC_TIMING_SD_HS) ||  in xenon_mmc_phy_init()
145 	    (priv->timing == MMC_TIMING_LEGACY))  in xenon_mmc_phy_init()
227 	 * If timing belongs to high speed, set bit[17] of  in xenon_mmc_phy_set()
230 	if ((priv->timing == MMC_TIMING_MMC_HS400) ||  in xenon_mmc_phy_set()
231 	    (priv->timing == MMC_TIMING_MMC_HS200) ||  in xenon_mmc_phy_set()
232 	    (priv->timing == MMC_TIMING_UHS_SDR50) ||  in xenon_mmc_phy_set()
233 	    (priv->timing == MMC_TIMING_UHS_SDR104) ||  in xenon_mmc_phy_set()
234 	    (priv->timing == MMC_TIMING_UHS_DDR50) ||  in xenon_mmc_phy_set()
235 	    (priv->timing == MMC_TIMING_UHS_SDR25) ||  in xenon_mmc_phy_set()
236 	    (priv->timing == MMC_TIMING_MMC_DDR52)) {  in xenon_mmc_phy_set()
339 	/* Set timing variable according to the configured speed */  in xenon_sdhci_set_ios_post()
344 				priv->timing = MMC_TIMING_UHS_DDR50;  in xenon_sdhci_set_ios_post()
346 				priv->timing = MMC_TIMING_UHS_SDR25;  in xenon_sdhci_set_ios_post()
348 				priv->timing = MMC_TIMING_UHS_SDR50;  in xenon_sdhci_set_ios_post()
351 				priv->timing = MMC_TIMING_LEGACY;  in xenon_sdhci_set_ios_post()
353 				priv->timing = MMC_TIMING_SD_HS;  in xenon_sdhci_set_ios_post()
358 			priv->timing = MMC_TIMING_MMC_DDR52;  in xenon_sdhci_set_ios_post()
360 			priv->timing = MMC_TIMING_LEGACY;  in xenon_sdhci_set_ios_post()
362 			priv->timing = MMC_TIMING_MMC_HS;  in xenon_sdhci_set_ios_post()
390 	/* Set default timing */  in xenon_sdhci_probe()
391 	priv->timing = MMC_TIMING_LEGACY;  in xenon_sdhci_probe()