Lines Matching +full:auto +full:- +full:cmd12
1 // SPDX-License-Identifier: GPL-2.0+
14 #include <linux/dma-direction.h>
20 #include "tmio-common.h"
26 return readq(priv->regbase + (reg << 1)); in tmio_sd_readq()
32 writeq(val, priv->regbase + (reg << 1)); in tmio_sd_writeq()
37 return readw(priv->regbase + (reg >> 1)); in tmio_sd_readw()
43 writew(val, priv->regbase + (reg >> 1)); in tmio_sd_writew()
50 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_readl()
51 return readl(priv->regbase + (reg << 1)); in tmio_sd_readl()
52 else if (priv->caps & TMIO_SD_CAP_16BIT) { in tmio_sd_readl()
53 val = readw(priv->regbase + (reg >> 1)) & 0xffff; in tmio_sd_readl()
56 val |= readw(priv->regbase + (reg >> 1) + 2) << 16; in tmio_sd_readl()
60 return readl(priv->regbase + reg); in tmio_sd_readl()
66 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_writel()
67 writel(val, priv->regbase + (reg << 1)); in tmio_sd_writel()
68 else if (priv->caps & TMIO_SD_CAP_16BIT) { in tmio_sd_writel()
69 writew(val & 0xffff, priv->regbase + (reg >> 1)); in tmio_sd_writel()
73 writew(val >> 16, priv->regbase + (reg >> 1) + 2); in tmio_sd_writel()
75 writel(val, priv->regbase + reg); in tmio_sd_writel()
109 return -ETIMEDOUT; in tmio_sd_check_error()
114 return -ETIMEDOUT; in tmio_sd_check_error()
119 if ((cmd->cmdidx != MMC_CMD_SEND_TUNING_BLOCK) && in tmio_sd_check_error()
120 (cmd->cmdidx != MMC_CMD_SEND_TUNING_BLOCK_HS200)) in tmio_sd_check_error()
122 return -EILSEQ; in tmio_sd_check_error()
128 return -EIO; in tmio_sd_check_error()
142 if (wait-- < 0) { in tmio_sd_wait_for_irq()
144 return -ETIMEDOUT; in tmio_sd_wait_for_irq()
197 * TMIO_SD_INFO2_BRE is edge-triggered, not level-triggered. in tmio_sd_pio_read_one_block()
201 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_pio_read_one_block()
203 else if (priv->caps & TMIO_SD_CAP_16BIT) in tmio_sd_pio_read_one_block()
250 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_pio_write_one_block()
252 else if (priv->caps & TMIO_SD_CAP_16BIT) in tmio_sd_pio_write_one_block()
263 const char *src = data->src; in tmio_sd_pio_xfer()
264 char *dest = data->dest; in tmio_sd_pio_xfer()
267 for (i = 0; i < data->blocks; i++) { in tmio_sd_pio_xfer()
268 if (data->flags & MMC_DATA_READ) in tmio_sd_pio_xfer()
270 data->blocksize); in tmio_sd_pio_xfer()
273 data->blocksize); in tmio_sd_pio_xfer()
277 if (data->flags & MMC_DATA_READ) in tmio_sd_pio_xfer()
278 dest += data->blocksize; in tmio_sd_pio_xfer()
280 src += data->blocksize; in tmio_sd_pio_xfer()
316 if (wait-- < 0) { in tmio_sd_dma_wait_for_irq()
318 return -ETIMEDOUT; in tmio_sd_dma_wait_for_irq()
326 return -EIO; in tmio_sd_dma_wait_for_irq()
335 size_t len = data->blocks * data->blocksize; in tmio_sd_dma_xfer()
344 if (data->flags & MMC_DATA_READ) { in tmio_sd_dma_xfer()
345 buf = data->dest; in tmio_sd_dma_xfer()
353 poll_flag = priv->read_poll_flag; in tmio_sd_dma_xfer()
356 buf = (void *)data->src; in tmio_sd_dma_xfer()
368 ret = tmio_sd_dma_wait_for_irq(dev, poll_flag, data->blocks); in tmio_sd_dma_xfer()
414 return -EBUSY; in tmio_sd_send_cmd()
426 tmio_sd_writel(priv, cmd->cmdarg, TMIO_SD_ARG); in tmio_sd_send_cmd()
428 tmp = cmd->cmdidx; in tmio_sd_send_cmd()
431 tmio_sd_writel(priv, data->blocksize, TMIO_SD_SIZE); in tmio_sd_send_cmd()
432 tmio_sd_writel(priv, data->blocks, TMIO_SD_SECCNT); in tmio_sd_send_cmd()
434 /* Do not send CMD12 automatically */ in tmio_sd_send_cmd()
437 if (data->blocks > 1) in tmio_sd_send_cmd()
440 if (data->flags & MMC_DATA_READ) in tmio_sd_send_cmd()
445 * Do not use the response type auto-detection on this hardware. in tmio_sd_send_cmd()
450 switch (cmd->resp_type) { in tmio_sd_send_cmd()
468 return -EINVAL; in tmio_sd_send_cmd()
472 cmd->cmdidx, tmp, cmd->cmdarg); in tmio_sd_send_cmd()
480 if (cmd->resp_type & MMC_RSP_136) { in tmio_sd_send_cmd()
486 cmd->response[0] = ((rsp_127_104 & 0x00ffffff) << 8) | in tmio_sd_send_cmd()
488 cmd->response[1] = ((rsp_103_72 & 0x00ffffff) << 8) | in tmio_sd_send_cmd()
490 cmd->response[2] = ((rsp_71_40 & 0x00ffffff) << 8) | in tmio_sd_send_cmd()
492 cmd->response[3] = (rsp_39_8 & 0xffffff) << 8; in tmio_sd_send_cmd()
494 /* bit 39-8 */ in tmio_sd_send_cmd()
495 cmd->response[0] = tmio_sd_readl(priv, TMIO_SD_RSP10); in tmio_sd_send_cmd()
500 if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL && in tmio_sd_send_cmd()
501 tmio_sd_addr_is_dmaable(data->src)) in tmio_sd_send_cmd()
523 switch (mmc->bus_width) { in tmio_sd_set_bus_width()
535 return -EINVAL; in tmio_sd_set_bus_width()
552 if (mmc->ddr_mode) in tmio_sd_set_ddr_mode()
561 return priv->clk_get_rate(priv); in tmio_sd_clk_get_rate()
570 if (mmc->clock) { in tmio_sd_set_clk_rate()
573 divisor = DIV_ROUND_UP(mclk, mmc->clock); in tmio_sd_set_clk_rate()
576 if (mmc->ddr_mode && (divisor == 1)) in tmio_sd_set_clk_rate()
580 val = (priv->caps & TMIO_SD_CAP_RCAR) ? in tmio_sd_set_clk_rate()
598 else if (divisor <= 512 || !(priv->caps & TMIO_SD_CAP_DIV1024)) in tmio_sd_set_clk_rate()
605 if (mmc->clock && in tmio_sd_set_clk_rate()
621 if (mmc->clk_disable) { in tmio_sd_set_clk_rate()
641 if (priv->vqmmc_dev) { in tmio_sd_set_pins()
642 if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) in tmio_sd_set_pins()
643 regulator_set_value(priv->vqmmc_dev, 1800000); in tmio_sd_set_pins()
645 regulator_set_value(priv->vqmmc_dev, 3300000); in tmio_sd_set_pins()
646 regulator_set_enable(priv->vqmmc_dev, true); in tmio_sd_set_pins()
651 if (mmc->signal_voltage == MMC_SIGNAL_VOLTAGE_180) in tmio_sd_set_pins()
665 mmc->clock, mmc->ddr_mode, mmc->bus_width); in tmio_sd_set_ios()
681 if (priv->caps & TMIO_SD_CAP_NONREMOVABLE) in tmio_sd_get_cd()
708 if (priv->version >= 0x10) { in tmio_sd_host_init()
709 if (priv->caps & TMIO_SD_CAP_64BIT) in tmio_sd_host_init()
717 if (priv->caps & TMIO_SD_CAP_DMA_INTERNAL) { in tmio_sd_host_init()
728 return mmc_bind(dev, &plat->mmc, &plat->cfg); in tmio_sd_bind()
742 return -EINVAL; in tmio_sd_probe()
744 priv->regbase = devm_ioremap(dev, base, SZ_2K); in tmio_sd_probe()
745 if (!priv->regbase) in tmio_sd_probe()
746 return -ENOMEM; in tmio_sd_probe()
749 device_get_supply_regulator(dev, "vqmmc-supply", &priv->vqmmc_dev); in tmio_sd_probe()
750 if (priv->vqmmc_dev) in tmio_sd_probe()
751 regulator_set_value(priv->vqmmc_dev, 3300000); in tmio_sd_probe()
754 ret = mmc_of_parse(dev, &plat->cfg); in tmio_sd_probe()
760 plat->cfg.name = dev->name; in tmio_sd_probe()
761 plat->cfg.host_caps |= MMC_MODE_HS_52MHz | MMC_MODE_HS; in tmio_sd_probe()
764 priv->caps = quirks; in tmio_sd_probe()
766 priv->version = tmio_sd_readl(priv, TMIO_SD_VERSION) & in tmio_sd_probe()
768 dev_dbg(dev, "version %x\n", priv->version); in tmio_sd_probe()
769 if (priv->version >= 0x10) { in tmio_sd_probe()
770 priv->caps |= TMIO_SD_CAP_DMA_INTERNAL; in tmio_sd_probe()
771 priv->caps |= TMIO_SD_CAP_DIV1024; in tmio_sd_probe()
774 if (fdt_get_property(gd->fdt_blob, dev_of_offset(dev), "non-removable", in tmio_sd_probe()
776 priv->caps |= TMIO_SD_CAP_NONREMOVABLE; in tmio_sd_probe()
782 plat->cfg.voltages = MMC_VDD_165_195 | MMC_VDD_32_33 | MMC_VDD_33_34; in tmio_sd_probe()
783 plat->cfg.f_min = mclk / in tmio_sd_probe()
784 (priv->caps & TMIO_SD_CAP_DIV1024 ? 1024 : 512); in tmio_sd_probe()
785 plat->cfg.f_max = mclk; in tmio_sd_probe()
787 plat->cfg.b_max = U16_MAX; /* max value of TMIO_SD_SECCNT */ in tmio_sd_probe()
789 plat->cfg.b_max = U32_MAX; /* max value of TMIO_SD_SECCNT */ in tmio_sd_probe()
791 upriv->mmc = &plat->mmc; in tmio_sd_probe()