Lines Matching +full:stm32 +full:- +full:timer
50 bool "Rockchip e-fuse support"
53 Enable (read-only) access for the e-fuse block found in Rockchip
55 or through child-nodes that are generated based on the e-fuse map
74 Enable command-line access to the Chrome OS EC (Embedded
76 a number of sub-commands for performing EC tasks such as
112 keyboard (use the -l flag to enable the LCD), verified boot context,
121 ARM Chromebooks such as pit, pi and nyan-big. The SPI interface
129 integrated 64-byte EEPROM, four programmable non-volatile I/O pins
130 and a configurable timer for the supervisor function. The device is
163 bool "Enable power-sequencing drivers"
166 Power-sequencing drivers provide support for controlling power for
172 bool "Enable power-sequencing drivers for SPL"
175 Power-sequencing drivers provide support for controlling power for
203 bool "Enable RCC driver for the STM32 SoC's family"
204 depends on (STM32 || ARCH_STM32MP) && MISC
206 Enable the STM32 RCC driver. The RCC block (Reset and Clock Control
225 PMIC I2C bus, etc. This driver provides the core low-level
226 communication path by which feature-specific drivers (such as clock)
250 bool "Enable driver for generic I2C-attached EEPROMs"
257 bool "Enable driver for generic I2C-attached EEPROMs for SPL"
260 This option is an SPL-variant of the I2C_EEPROM option.