168 static void bcm_kona_i2c_send_cmd_to_ctrl(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_send_cmd_to_ctrl()  argument
177 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
184 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
191 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
197 		       dev->base + CS_OFFSET);  in bcm_kona_i2c_send_cmd_to_ctrl()
205 static void bcm_kona_i2c_enable_clock(struct bcm_kona_i2c_dev *dev)  in bcm_kona_i2c_enable_clock()  argument
207 	writel(readl(dev->base + CLKEN_OFFSET) | CLKEN_CLKEN_MASK,  in bcm_kona_i2c_enable_clock()
208 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_enable_clock()
211 static void bcm_kona_i2c_disable_clock(struct bcm_kona_i2c_dev *dev)  in bcm_kona_i2c_disable_clock()  argument
213 	writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_CLKEN_MASK,  in bcm_kona_i2c_disable_clock()
214 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_disable_clock()
218 static unsigned long wait_for_int_timeout(struct bcm_kona_i2c_dev *dev,  in wait_for_int_timeout()  argument
225 		status = readl(dev->base + ISR_OFFSET);  in wait_for_int_timeout()
235 			       dev->base + TXFCR_OFFSET);  in wait_for_int_timeout()
237 		writel(status & ~ISR_RESERVED_MASK, dev->base + ISR_OFFSET);  in wait_for_int_timeout()
250 static int bcm_kona_send_i2c_cmd(struct bcm_kona_i2c_dev *dev,  in bcm_kona_send_i2c_cmd()  argument
257 	bcm_kona_i2c_send_cmd_to_ctrl(dev, cmd);  in bcm_kona_send_i2c_cmd()
260 	time_left = wait_for_int_timeout(dev, time_left, IER_I2C_INT_EN_MASK);  in bcm_kona_send_i2c_cmd()
268 	bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION);  in bcm_kona_send_i2c_cmd()
274 static int bcm_kona_i2c_read_fifo_single(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_read_fifo_single()  argument
282 	       (len << RXFCR_READ_COUNT_SHIFT), dev->base + RXFCR_OFFSET);  in bcm_kona_i2c_read_fifo_single()
286 	    wait_for_int_timeout(dev, time_left, IER_READ_COMPLETE_INT_MASK);  in bcm_kona_i2c_read_fifo_single()
295 		*buf = readl(dev->base + RXFIFORDOUT_OFFSET);  in bcm_kona_i2c_read_fifo_single()
301 static int bcm_kona_i2c_read_fifo(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_read_fifo()  argument
317 		rc = bcm_kona_i2c_read_fifo_single(dev, tmp_buf, bytes_to_read,  in bcm_kona_i2c_read_fifo()
330 static int bcm_kona_i2c_write_byte(struct bcm_kona_i2c_dev *dev, uint8_t data,  in bcm_kona_i2c_write_byte()  argument
337 	writel(ISR_SES_DONE_MASK, dev->base + ISR_OFFSET);  in bcm_kona_i2c_write_byte()
340 	writel(data, dev->base + DAT_OFFSET);  in bcm_kona_i2c_write_byte()
342 	time_left = wait_for_int_timeout(dev, time_left, IER_I2C_INT_EN_MASK);  in bcm_kona_i2c_write_byte()
349 	nak_received = readl(dev->base + CS_OFFSET) & CS_ACK_MASK ? 1 : 0;  in bcm_kona_i2c_write_byte()
360 static int bcm_kona_i2c_write_fifo_single(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_write_fifo_single()  argument
369 		writel(buf[k], (dev->base + DAT_OFFSET));  in bcm_kona_i2c_write_fifo_single()
374 		    wait_for_int_timeout(dev, time_left,  in bcm_kona_i2c_write_fifo_single()
377 		fifo_status = readl(dev->base + FIFO_STATUS_OFFSET);  in bcm_kona_i2c_write_fifo_single()
381 	if (readl(dev->base + CS_OFFSET) & CS_ACK_MASK) {  in bcm_kona_i2c_write_fifo_single()
396 static int bcm_kona_i2c_write_fifo(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_write_fifo()  argument
409 		rc = bcm_kona_i2c_write_fifo_single(dev, tmp_buf,  in bcm_kona_i2c_write_fifo()
422 static int bcm_kona_i2c_do_addr(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_do_addr()  argument
430 		if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)  in bcm_kona_i2c_do_addr()
435 		if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)  in bcm_kona_i2c_do_addr()
440 			if (bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART) < 0)  in bcm_kona_i2c_do_addr()
445 			if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)  in bcm_kona_i2c_do_addr()
454 		if (bcm_kona_i2c_write_byte(dev, addr, 0) < 0)  in bcm_kona_i2c_do_addr()
461 static void bcm_kona_i2c_enable_autosense(struct bcm_kona_i2c_dev *dev)  in bcm_kona_i2c_enable_autosense()  argument
463 	writel(readl(dev->base + CLKEN_OFFSET) & ~CLKEN_AUTOSENSE_OFF_MASK,  in bcm_kona_i2c_enable_autosense()
464 	       dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_enable_autosense()
467 static void bcm_kona_i2c_config_timing(struct bcm_kona_i2c_dev *dev)  in bcm_kona_i2c_config_timing()  argument
469 	writel(readl(dev->base + HSTIM_OFFSET) & ~HSTIM_HS_MODE_MASK,  in bcm_kona_i2c_config_timing()
470 	       dev->base + HSTIM_OFFSET);  in bcm_kona_i2c_config_timing()
472 	writel((dev->std_cfg->prescale << TIM_PRESCALE_SHIFT) |  in bcm_kona_i2c_config_timing()
473 	       (dev->std_cfg->time_p << TIM_P_SHIFT) |  in bcm_kona_i2c_config_timing()
474 	       (dev->std_cfg->no_div << TIM_NO_DIV_SHIFT) |  in bcm_kona_i2c_config_timing()
475 	       (dev->std_cfg->time_div << TIM_DIV_SHIFT),  in bcm_kona_i2c_config_timing()
476 	       dev->base + TIM_OFFSET);  in bcm_kona_i2c_config_timing()
478 	writel((dev->std_cfg->time_m << CLKEN_M_SHIFT) |  in bcm_kona_i2c_config_timing()
479 	       (dev->std_cfg->time_n << CLKEN_N_SHIFT) |  in bcm_kona_i2c_config_timing()
480 	       CLKEN_CLKEN_MASK, dev->base + CLKEN_OFFSET);  in bcm_kona_i2c_config_timing()
484 static int bcm_kona_i2c_xfer(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_xfer()  argument
492 	writel(0, dev->base + PADCTL_OFFSET);  in bcm_kona_i2c_xfer()
495 	bcm_kona_i2c_enable_clock(dev);  in bcm_kona_i2c_xfer()
498 	rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_START);  in bcm_kona_i2c_xfer()
510 			rc = bcm_kona_send_i2c_cmd(dev, BCM_CMD_RESTART);  in bcm_kona_i2c_xfer()
519 			rc = bcm_kona_i2c_do_addr(dev, pmsg);  in bcm_kona_i2c_xfer()
529 			rc = bcm_kona_i2c_read_fifo(dev, pmsg);  in bcm_kona_i2c_xfer()
535 			rc = bcm_kona_i2c_write_fifo(dev, pmsg);  in bcm_kona_i2c_xfer()
547 	bcm_kona_send_i2c_cmd(dev, BCM_CMD_STOP);  in bcm_kona_i2c_xfer()
551 	writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);  in bcm_kona_i2c_xfer()
554 	bcm_kona_i2c_disable_clock(dev);  in bcm_kona_i2c_xfer()
559 static uint bcm_kona_i2c_assign_bus_speed(struct bcm_kona_i2c_dev *dev,  in bcm_kona_i2c_assign_bus_speed()  argument
564 		dev->std_cfg = &std_cfg_table[BCM_SPD_100K];  in bcm_kona_i2c_assign_bus_speed()
567 		dev->std_cfg = &std_cfg_table[BCM_SPD_400K];  in bcm_kona_i2c_assign_bus_speed()
570 		dev->std_cfg = &std_cfg_table[BCM_SPD_1MHZ];  in bcm_kona_i2c_assign_bus_speed()
576 	dev->speed = speed;  in bcm_kona_i2c_assign_bus_speed()
580 static void bcm_kona_i2c_init(struct bcm_kona_i2c_dev *dev)  in bcm_kona_i2c_init()  argument
583 	bcm_kona_i2c_assign_bus_speed(dev, dev->speed);  in bcm_kona_i2c_init()
586 	bcm_kona_i2c_enable_clock(dev);  in bcm_kona_i2c_init()
589 	bcm_kona_i2c_config_timing(dev);  in bcm_kona_i2c_init()
592 	writel(0, dev->base + TOUT_OFFSET);  in bcm_kona_i2c_init()
595 	bcm_kona_i2c_enable_autosense(dev);  in bcm_kona_i2c_init()
599 	       dev->base + TXFCR_OFFSET);  in bcm_kona_i2c_init()
602 	writel(0, dev->base + IER_OFFSET);  in bcm_kona_i2c_init()
609 	       ISR_TXFIFOEMPTY_MASK | ISR_NOACK_MASK, dev->base + ISR_OFFSET);  in bcm_kona_i2c_init()
612 	bcm_kona_i2c_send_cmd_to_ctrl(dev, BCM_CMD_NOACTION);  in bcm_kona_i2c_init()
615 	writel(PADCTL_PAD_OUT_EN_MASK, dev->base + PADCTL_OFFSET);  in bcm_kona_i2c_init()
628 	struct bcm_kona_i2c_dev *dev = kona_get_dev(adap);  in kona_i2c_init()  local
630 	if (clk_bsc_enable(dev->base))  in kona_i2c_init()
633 	bcm_kona_i2c_init(dev);  in kona_i2c_init()
642 	struct bcm_kona_i2c_dev *dev = kona_get_dev(adap);  in kona_i2c_read()  local
656 	if (bcm_kona_i2c_xfer(dev, msg, 2) < 0) {  in kona_i2c_read()
671 	struct bcm_kona_i2c_dev *dev = kona_get_dev(adap);  in kona_i2c_write()  local
681 		if (bcm_kona_i2c_xfer(dev, msg, 1) < 0) {  in kona_i2c_write()
702 	struct bcm_kona_i2c_dev *dev = kona_get_dev(adap);  in kona_i2c_set_bus_speed()  local
703 	return bcm_kona_i2c_assign_bus_speed(dev, speed);  in kona_i2c_set_bus_speed()