Lines Matching +full:default +full:- +full:on
9 depends on DM
21 depends on DM
23 Enable old-style I2C functions for compatibility with existing code.
30 depends on CROS_EC
39 bool "Provide access to LDOs on the Chrome OS EC"
40 depends on CROS_EC
41 ---help---
42 On many Chromebooks the main PMIC is inaccessible to the AP. This is
43 often dealt with by using an I2C pass-through interface provided by
44 the EC. On some unfortunate models (e.g. Spring) the pass-through
53 bool "Set default I2C bus number"
54 depends on DM_I2C
56 Set default number of I2C bus to be accessed. This option provides
60 hex "I2C default bus number"
61 depends on I2C_SET_DEFAULT_BUS_NUM
62 default 0x0
64 Number of default I2C bus to use
68 depends on DM_I2C && DM_GPIO
71 configuration is given by the device tree. Kernel-style device tree
73 Binding info: doc/device-tree-bindings/i2c/i2c-gpio.txt
77 depends on DM_I2C && ARCH_AT91
82 i2c-gpio driver unless your system can cope with this limitation.
83 Binding info: doc/device-tree-bindings/i2c/i2c-at91.txt
87 depends on DM_I2C
89 Add support for Freescale I2C busses as used on MPC8240, MPC8245, and
94 depends on DM_I2C && (ARCH_ZYNQ || ARM64)
101 depends on (ARCH_KEYSTONE || ARCH_DAVINCI)
107 default n
115 depends on SYS_I2C_DW && (TARGET_SPEAR300 || TARGET_SPEAR310 || \
117 default y
128 depends on DM_I2C && ARCH_ASPEED
136 depends on DM_I2C && ARCH_ASPEED
141 Only single master mode is supported and only byte-by-byte
146 depends on DM_I2C
160 depends on DM_I2C && ARCH_MESON
167 both 7-bit and 10-bit addresses.
173 channels and operating on standard mode up to 100 kbits/s and fast
229 default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
230 default 100000
236 default 0
244 default 40000000 if TARGET_LS2080A_SIMU || TARGET_LS2080A_EMU
245 default 100000
251 default 0
259 default 100000
265 default 0
273 default 100000
279 default 0
287 default 100000
293 default 0
301 default 100000
307 default 0
315 default 100000
321 default 0
329 default 100000
335 default 0
342 depends on ARCH_OMAP2PLUS
349 default 1
355 default 100000
362 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
368 depends on (RCAR_GEN3 || RCAR_GEN2) && DM_I2C
374 depends on DM_I2C
383 depends on SANDBOX && DM_I2C
391 depends on ARCH_EXYNOS4 && DM_I2C
397 depends on (STM32F7 || STM32H7 || ARCH_STM32MP) && DM_I2C
403 _ Standard-mode (up to 100 kHz)
404 _ Fast-mode (up to 400 kHz)
405 _ Fast-mode Plus (up to 1 MHz)
406 _ 7-bit and 10-bit addressing mode
407 _ Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
408 _ All 7-bit addresses acknowledge mode
417 depends on TEGRA
423 depends on ARCH_UNIPHIER && DM_I2C
424 default y
427 is used on PH1-LD4, PH1-sLD8 or older UniPhier SoCs.
430 bool "UniPhier FIFO-builtin I2C driver"
431 depends on ARCH_UNIPHIER && DM_I2C
432 default y
434 Support for UniPhier FIFO-builtin I2C controller driver.
435 This I2C controller is used on PH1-Pro4 or newer UniPhier SoCs.
439 depends on DM_I2C && (TARGET_VEXPRESS_CA15_TC2 || TARGET_VEXPRESS64_JUNO)
446 depends on DM_I2C
448 Support for Marvell I2C controllers as used on the orion5x and
452 bool "Enable Tegra186 BPMP-based I2C driver"
453 depends on TEGRA186_BPMP
456 Power Management Processor). On Tegra186, some I2C controllers are
463 depends on ARCH_KEYSTONE || ARCH_OMAP2PLUS || ARCH_SOCFPGA
464 default 2 if TI816X
465 default 3 if OMAP34XX || AM33XX || AM43XX || ARCH_KEYSTONE
466 default 4 if ARCH_SOCFPGA || OMAP44XX || TI814X
467 default 5 if OMAP54XX
473 depends on DM_I2C
479 depends on DM_I2C
481 Support for gdsys IHS I2C driver on FPGA bus.