Lines Matching full:bank
35 /* Platform data for each bank */
37 struct s5p_gpio_bank *bank; member
41 /* Information about each bank at run-time */
43 struct s5p_gpio_bank *bank; member
59 struct s5p_gpio_bank *bank; in s5p_gpio_get_bank() local
60 bank = (struct s5p_gpio_bank *)data->reg_addr; in s5p_gpio_get_bank()
61 bank += (gpio - upto) / GPIO_PER_BANK; in s5p_gpio_get_bank()
62 debug("gpio=%d, bank=%p\n", gpio, bank); in s5p_gpio_get_bank()
63 return bank; in s5p_gpio_get_bank()
73 static void s5p_gpio_cfg_pin(struct s5p_gpio_bank *bank, int gpio, int cfg) in s5p_gpio_cfg_pin() argument
77 value = readl(&bank->con); in s5p_gpio_cfg_pin()
80 writel(value, &bank->con); in s5p_gpio_cfg_pin()
83 static void s5p_gpio_set_value(struct s5p_gpio_bank *bank, int gpio, int en) in s5p_gpio_set_value() argument
87 value = readl(&bank->dat); in s5p_gpio_set_value()
91 writel(value, &bank->dat); in s5p_gpio_set_value()
104 static int s5p_gpio_get_cfg_pin(struct s5p_gpio_bank *bank, int gpio) in s5p_gpio_get_cfg_pin() argument
108 value = readl(&bank->con); in s5p_gpio_get_cfg_pin()
113 static unsigned int s5p_gpio_get_value(struct s5p_gpio_bank *bank, int gpio) in s5p_gpio_get_value() argument
117 value = readl(&bank->dat); in s5p_gpio_get_value()
122 static void s5p_gpio_set_pull(struct s5p_gpio_bank *bank, int gpio, int mode) in s5p_gpio_set_pull() argument
126 value = readl(&bank->pull); in s5p_gpio_set_pull()
138 writel(value, &bank->pull); in s5p_gpio_set_pull()
141 static void s5p_gpio_set_drv(struct s5p_gpio_bank *bank, int gpio, int mode) in s5p_gpio_set_drv() argument
145 value = readl(&bank->drv); in s5p_gpio_set_drv()
159 writel(value, &bank->drv); in s5p_gpio_set_drv()
162 static void s5p_gpio_set_rate(struct s5p_gpio_bank *bank, int gpio, int mode) in s5p_gpio_set_rate() argument
166 value = readl(&bank->drv); in s5p_gpio_set_rate()
178 writel(value, &bank->drv); in s5p_gpio_set_rate()
194 s5p_gpio_cfg_pin(state->bank, offset, S5P_GPIO_INPUT); in exynos_gpio_direction_input()
206 s5p_gpio_set_value(state->bank, offset, value); in exynos_gpio_direction_output()
209 s5p_gpio_cfg_pin(state->bank, offset, S5P_GPIO_OUTPUT); in exynos_gpio_direction_output()
219 return s5p_gpio_get_value(state->bank, offset); in exynos_gpio_get_value()
228 s5p_gpio_set_value(state->bank, offset, value); in exynos_gpio_set_value()
268 cfg = s5p_gpio_get_cfg_pin(state->bank, offset); in exynos_gpio_get_function()
295 priv->bank = plat->bank; in gpio_exynos_probe()
305 * device for each Exynos GPIO bank.
310 struct s5p_gpio_bank *bank, *base; in gpio_exynos_bind() local
319 for (node = fdt_first_subnode(blob, dev_of_offset(parent)), bank = base; in gpio_exynos_bind()
321 node = fdt_next_subnode(blob, node), bank++) { in gpio_exynos_bind()
343 bank = (struct s5p_gpio_bank *)((ulong)base + reg); in gpio_exynos_bind()
345 plat->bank = bank; in gpio_exynos_bind()
347 debug("dev at %p: %s\n", bank, plat->bank_name); in gpio_exynos_bind()