drivers/gpio/gpio-rcar.c

1 // SPDX-License-Identifier: GPL-2.0+
10 #include <asm/gpio.h>
45 	if (readl(priv->regs + GPIO_INOUTSEL) & bit)  in rcar_gpio_get_value()
46 		return !!(readl(priv->regs + GPIO_OUTDT) & bit);  in rcar_gpio_get_value()
48 		return !!(readl(priv->regs + GPIO_INDT) & bit);  in rcar_gpio_get_value()
57 		setbits_le32(priv->regs + GPIO_OUTDT, BIT(offset));  in rcar_gpio_set_value()
59 		clrbits_le32(priv->regs + GPIO_OUTDT, BIT(offset));  in rcar_gpio_set_value()
68 	 * follow steps in the GPIO documentation for  in rcar_gpio_set_direction()
90 	rcar_gpio_set_direction(priv->regs, offset, false);  in rcar_gpio_direction_input()
100 	/* write GPIO value to output before selecting output mode of pin */  in rcar_gpio_direction_output()
102 	rcar_gpio_set_direction(priv->regs, offset, true);  in rcar_gpio_direction_output()
111 	if (readl(priv->regs + GPIO_INOUTSEL) & BIT(offset))  in rcar_gpio_get_function()
128 	return sh_pfc_config_mux_for_gpio(pctldev, priv->pfc_offset + offset);  in rcar_gpio_request()
149 	priv->regs = (void __iomem *)devfdt_get_addr(dev);  in rcar_gpio_probe()
150 	uc_priv->bank_name = dev->name;  in rcar_gpio_probe()
152 	ret = fdtdec_parse_phandle_with_args(gd->fdt_blob, node, "gpio-ranges",  in rcar_gpio_probe()
154 	priv->pfc_offset = ret == 0 ? args.args[1] : -1;  in rcar_gpio_probe()
155 	uc_priv->gpio_count = ret == 0 ? args.args[2] : RCAR_MAX_GPIO_PER_BANK;  in rcar_gpio_probe()
159 		dev_err(dev, "Failed to get GPIO bank clock\n");  in rcar_gpio_probe()
166 		dev_err(dev, "Failed to enable GPIO bank clock\n");  in rcar_gpio_probe()
174 	{ .compatible = "renesas,gpio-r8a7795" },
175 	{ .compatible = "renesas,gpio-r8a7796" },
176 	{ .compatible = "renesas,gpio-r8a77965" },
177 	{ .compatible = "renesas,gpio-r8a77970" },
178 	{ .compatible = "renesas,gpio-r8a77990" },
179 	{ .compatible = "renesas,gpio-r8a77995" },
180 	{ .compatible = "renesas,rcar-gen2-gpio" },
181 	{ .compatible = "renesas,rcar-gen3-gpio" },
186 	.name	= "rcar-gpio",