Lines Matching +full:pin +full:- +full:mux
1 // SPDX-License-Identifier: GPL-2.0+
52 writel(mask, &at91_port->puer); in at91_set_port_pullup()
54 writel(mask, &at91_port->pudr); in at91_set_port_pullup()
55 writel(mask, &at91_port->per); in at91_set_port_pullup()
58 int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) in at91_set_pio_pullup() argument
62 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_pullup()
63 at91_set_port_pullup(at91_port, pin, use_pullup); in at91_set_pio_pullup()
69 * mux the pin to the "GPIO" peripheral role.
71 int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup) in at91_set_pio_periph() argument
76 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_periph()
77 mask = 1 << pin; in at91_set_pio_periph()
78 writel(mask, &at91_port->idr); in at91_set_pio_periph()
79 at91_set_pio_pullup(port, pin, use_pullup); in at91_set_pio_periph()
80 writel(mask, &at91_port->per); in at91_set_pio_periph()
87 * mux the pin to the "A" internal peripheral role.
89 int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup) in at91_set_a_periph() argument
94 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_a_periph()
95 mask = 1 << pin; in at91_set_a_periph()
96 writel(mask, &at91_port->idr); in at91_set_a_periph()
97 at91_set_pio_pullup(port, pin, use_pullup); in at91_set_a_periph()
98 writel(mask, &at91_port->mux.pio2.asr); in at91_set_a_periph()
99 writel(mask, &at91_port->pdr); in at91_set_a_periph()
106 * mux the pin to the "B" internal peripheral role.
108 int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup) in at91_set_b_periph() argument
113 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_b_periph()
114 mask = 1 << pin; in at91_set_b_periph()
115 writel(mask, &at91_port->idr); in at91_set_b_periph()
116 at91_set_pio_pullup(port, pin, use_pullup); in at91_set_b_periph()
117 writel(mask, &at91_port->mux.pio2.bsr); in at91_set_b_periph()
118 writel(mask, &at91_port->pdr); in at91_set_b_periph()
125 * mux the pin to the "A" internal peripheral role.
127 int at91_pio3_set_a_periph(unsigned port, unsigned pin, int use_pullup) in at91_pio3_set_a_periph() argument
132 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_a_periph()
133 mask = 1 << pin; in at91_pio3_set_a_periph()
134 writel(mask, &at91_port->idr); in at91_pio3_set_a_periph()
135 at91_set_pio_pullup(port, pin, use_pullup); in at91_pio3_set_a_periph()
136 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, in at91_pio3_set_a_periph()
137 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_a_periph()
138 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, in at91_pio3_set_a_periph()
139 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_a_periph()
141 writel(mask, &at91_port->pdr); in at91_pio3_set_a_periph()
148 * mux the pin to the "B" internal peripheral role.
150 int at91_pio3_set_b_periph(unsigned port, unsigned pin, int use_pullup) in at91_pio3_set_b_periph() argument
155 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_b_periph()
156 mask = 1 << pin; in at91_pio3_set_b_periph()
157 writel(mask, &at91_port->idr); in at91_pio3_set_b_periph()
158 at91_set_pio_pullup(port, pin, use_pullup); in at91_pio3_set_b_periph()
159 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, in at91_pio3_set_b_periph()
160 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_b_periph()
161 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask, in at91_pio3_set_b_periph()
162 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_b_periph()
164 writel(mask, &at91_port->pdr); in at91_pio3_set_b_periph()
170 * mux the pin to the "C" internal peripheral role.
172 int at91_pio3_set_c_periph(unsigned port, unsigned pin, int use_pullup) in at91_pio3_set_c_periph() argument
177 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_c_periph()
178 mask = 1 << pin; in at91_pio3_set_c_periph()
179 writel(mask, &at91_port->idr); in at91_pio3_set_c_periph()
180 at91_set_pio_pullup(port, pin, use_pullup); in at91_pio3_set_c_periph()
181 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask, in at91_pio3_set_c_periph()
182 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_c_periph()
183 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, in at91_pio3_set_c_periph()
184 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_c_periph()
185 writel(mask, &at91_port->pdr); in at91_pio3_set_c_periph()
192 * mux the pin to the "D" internal peripheral role.
194 int at91_pio3_set_d_periph(unsigned port, unsigned pin, int use_pullup) in at91_pio3_set_d_periph() argument
199 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_d_periph()
200 mask = 1 << pin; in at91_pio3_set_d_periph()
201 writel(mask, &at91_port->idr); in at91_pio3_set_d_periph()
202 at91_set_pio_pullup(port, pin, use_pullup); in at91_pio3_set_d_periph()
203 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask, in at91_pio3_set_d_periph()
204 &at91_port->mux.pio3.abcdsr1); in at91_pio3_set_d_periph()
205 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask, in at91_pio3_set_d_periph()
206 &at91_port->mux.pio3.abcdsr2); in at91_pio3_set_d_periph()
207 writel(mask, &at91_port->pdr); in at91_pio3_set_d_periph()
219 val = readl(&at91_port->osr); in at91_get_port_output()
230 writel(mask, &at91_port->idr); in at91_set_port_input()
232 writel(mask, &at91_port->odr); in at91_set_port_input()
233 writel(mask, &at91_port->per); in at91_set_port_input()
237 * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
240 int at91_set_pio_input(unsigned port, u32 pin, int use_pullup) in at91_set_pio_input() argument
244 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_input()
245 at91_set_port_input(at91_port, pin, use_pullup); in at91_set_pio_input()
256 writel(mask, &at91_port->idr); in at91_set_port_output()
257 writel(mask, &at91_port->pudr); in at91_set_port_output()
259 writel(mask, &at91_port->sodr); in at91_set_port_output()
261 writel(mask, &at91_port->codr); in at91_set_port_output()
262 writel(mask, &at91_port->oer); in at91_set_port_output()
263 writel(mask, &at91_port->per); in at91_set_port_output()
267 * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
270 int at91_set_pio_output(unsigned port, u32 pin, int value) in at91_set_pio_output() argument
274 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_output()
275 at91_set_port_output(at91_port, pin, value); in at91_set_pio_output()
283 int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on) in at91_set_pio_deglitch() argument
288 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_deglitch()
289 mask = 1 << pin; in at91_set_pio_deglitch()
291 writel(mask, &at91_port->ifer); in at91_set_pio_deglitch()
293 writel(mask, &at91_port->ifdr); in at91_set_pio_deglitch()
302 int at91_pio3_set_pio_deglitch(unsigned port, unsigned pin, int is_on) in at91_pio3_set_pio_deglitch() argument
307 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_deglitch()
308 mask = 1 << pin; in at91_pio3_set_pio_deglitch()
310 writel(mask, &at91_port->mux.pio3.ifscdr); in at91_pio3_set_pio_deglitch()
311 writel(mask, &at91_port->ifer); in at91_pio3_set_pio_deglitch()
313 writel(mask, &at91_port->ifdr); in at91_pio3_set_pio_deglitch()
323 int at91_pio3_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div) in at91_pio3_set_pio_debounce() argument
328 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_debounce()
329 mask = 1 << pin; in at91_pio3_set_pio_debounce()
331 writel(mask, &at91_port->mux.pio3.ifscer); in at91_pio3_set_pio_debounce()
332 writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr); in at91_pio3_set_pio_debounce()
333 writel(mask, &at91_port->ifer); in at91_pio3_set_pio_debounce()
335 writel(mask, &at91_port->ifdr); in at91_pio3_set_pio_debounce()
343 * enable/disable the pull-down.
344 * If pull-up already enabled while calling the function, we disable it.
346 int at91_pio3_set_pio_pulldown(unsigned port, unsigned pin, int is_on) in at91_pio3_set_pio_pulldown() argument
351 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_pulldown()
352 mask = 1 << pin; in at91_pio3_set_pio_pulldown()
354 at91_set_pio_pullup(port, pin, 0); in at91_pio3_set_pio_pulldown()
355 writel(mask, &at91_port->mux.pio3.ppder); in at91_pio3_set_pio_pulldown()
357 writel(mask, &at91_port->mux.pio3.ppddr); in at91_pio3_set_pio_pulldown()
363 int at91_pio3_set_pio_pullup(unsigned port, unsigned pin, int use_pullup) in at91_pio3_set_pio_pullup() argument
368 at91_pio3_set_pio_pulldown(port, pin, 0); in at91_pio3_set_pio_pullup()
370 if (at91_port && (pin < GPIO_PER_BANK)) in at91_pio3_set_pio_pullup()
371 at91_set_port_pullup(at91_port, pin, use_pullup); in at91_pio3_set_pio_pullup()
379 int at91_pio3_set_pio_disable_schmitt_trig(unsigned port, unsigned pin) in at91_pio3_set_pio_disable_schmitt_trig() argument
384 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_pio3_set_pio_disable_schmitt_trig()
385 mask = 1 << pin; in at91_pio3_set_pio_disable_schmitt_trig()
386 writel(readl(&at91_port->schmitt) | mask, in at91_pio3_set_pio_disable_schmitt_trig()
387 &at91_port->schmitt); in at91_pio3_set_pio_disable_schmitt_trig()
394 * enable/disable the multi-driver. This is only valid for output and
395 * allows the output pin to run as an open collector output.
397 int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on) in at91_set_pio_multi_drive() argument
402 if (at91_port && (pin < GPIO_PER_BANK)) { in at91_set_pio_multi_drive()
403 mask = 1 << pin; in at91_set_pio_multi_drive()
405 writel(mask, &at91_port->mder); in at91_set_pio_multi_drive()
407 writel(mask, &at91_port->mddr); in at91_set_pio_multi_drive()
420 writel(mask, &at91_port->sodr); in at91_set_port_value()
422 writel(mask, &at91_port->codr); in at91_set_port_value()
426 * assuming the pin is muxed as a gpio output, set its value.
428 int at91_set_pio_value(unsigned port, unsigned pin, int value) in at91_set_pio_value() argument
432 if (at91_port && (pin < GPIO_PER_BANK)) in at91_set_pio_value()
433 at91_set_port_value(at91_port, pin, value); in at91_set_pio_value()
443 pdsr = readl(&at91_port->pdsr) & mask; in at91_get_port_value()
448 * read the pin's value (works even if it's not muxed as a gpio).
450 int at91_get_pio_value(unsigned port, unsigned pin) in at91_get_pio_value() argument
454 if (at91_port && (pin < GPIO_PER_BANK)) in at91_get_pio_value()
455 return at91_get_port_value(at91_port, pin); in at91_get_pio_value()
508 /* set GPIO pin 'gpio' as an input */
513 at91_set_port_input(port->regs, offset, 0); in at91_gpio_direction_input()
518 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
524 at91_set_port_output(port->regs, offset, value); in at91_gpio_direction_output()
529 /* read GPIO IN value of pin 'gpio' */
534 return at91_get_port_value(port->regs, offset); in at91_gpio_get_value()
537 /* write GPIO OUT value to pin 'gpio' */
543 at91_set_port_value(port->regs, offset, value); in at91_gpio_set_value()
553 if (at91_get_port_output(port->regs, offset)) in at91_gpio_get_function()
585 uc_priv->bank_name = plat->bank_name; in at91_gpio_probe()
586 uc_priv->gpio_count = GPIO_PER_BANK; in at91_gpio_probe()
589 plat->base_addr = (uint32_t)devfdt_get_addr_ptr(dev); in at91_gpio_probe()
591 port->regs = (struct at91_port *)plat->base_addr; in at91_gpio_probe()
598 { .compatible = "atmel,at91rm9200-gpio" },