29 /* Start the FPGA programming by initialize the FPGA Manager */
74 	/* To enable FPGA Manager configuration */  in fpgamgr_program_init()
77 	/* To enable FPGA Manager drive over configuration line */  in fpgamgr_program_init()
80 	/* Put FPGA into reset phase */  in fpgamgr_program_init()
83 	/* (1) wait until FPGA enter reset phase */  in fpgamgr_program_init()
91 		puts("FPGA: Could not reset\n");  in fpgamgr_program_init()
95 	/* Release FPGA from reset phase */  in fpgamgr_program_init()
98 	/* (2) wait until FPGA enter configuration phase */  in fpgamgr_program_init()
106 		puts("FPGA: Could not configure\n");  in fpgamgr_program_init()
119 /* Ensure the FPGA entering config done */
132 			printf("FPGA: Configuration error.\n");  in fpgamgr_program_poll_cd()
143 		printf("FPGA: Timeout waiting for program.\n");  in fpgamgr_program_poll_cd()
153 /* Ensure the FPGA entering init phase */
162 	/* (4) wait until FPGA enter init phase or user mode */  in fpgamgr_program_poll_initphase()
177 /* Ensure the FPGA entering user mode */
186 	/* (5) wait until FPGA enter user mode */  in fpgamgr_program_poll_usermode()
195 	/* To release FPGA Manager drive over configuration line */  in fpgamgr_program_poll_usermode()
202  * FPGA Manager to program the FPGA. This is the interface used by FPGA driver.
210 		puts("FPGA: Unaligned data, realign to 32bit boundary.\n");  in socfpga_load()
214 	/* Prior programming the FPGA, all bridges need to be shut off */  in socfpga_load()
216 	/* Disable all signals from hps peripheral controller to fpga */  in socfpga_load()
219 	/* Disable all signals from FPGA to HPS SDRAM */  in socfpga_load()
229 	/* Initialize the FPGA Manager */  in socfpga_load()
234 	/* Write the RBF data to FPGA Manager */  in socfpga_load()
237 	/* Ensure the FPGA entering config done */  in socfpga_load()
242 	/* Ensure the FPGA entering init phase */  in socfpga_load()
247 	/* Ensure the FPGA entering user mode */  in socfpga_load()