78 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_hw()
87 	reg_write(REG_DRAM_TRAINING_ADDR, reg);	/* 0x15B0 - Training Register */  in ddr3_write_leveling_hw()
91 	reg_write(REG_DRAM_TRAINING_SHADOW_ADDR, reg);  in ddr3_write_leveling_hw()
164 			reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_hw()
223 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_wl_supplement()
226 	reg_write(REG_DRAM_TRAINING_ADDR, reg);	/* 0x15B0 - Training Register */  in ddr3_wl_supplement()
258 					reg_write(REG_DRAM_TRAINING_2_ADDR,  in ddr3_wl_supplement()
403 					reg_write(REG_DRAM_TRAINING_2_ADDR,  in ddr3_wl_supplement()
453 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_wl_supplement()
457 	reg_write(REG_DRAM_TRAINING_1_ADDR, reg);  in ddr3_wl_supplement()
501 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_hw_reg_dimm()
510 	reg_write(REG_DRAM_TRAINING_ADDR, reg);	/* 0x15B0 - Training Register */  in ddr3_write_leveling_hw_reg_dimm()
514 	reg_write(REG_DRAM_TRAINING_SHADOW_ADDR, reg);  in ddr3_write_leveling_hw_reg_dimm()
600 			reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_hw_reg_dimm()
632 		reg_write(REG_DRAM_TRAINING_ADDR, 0);  in ddr3_write_leveling_hw_reg_dimm()
672 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_sw()
686 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw()
695 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
708 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
716 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
733 				reg_write(REG_SDRAM_OPERATION_ADDR, reg);	/* 0x1418 - SDRAM Operation Register */  in ddr3_write_leveling_sw()
753 			reg_write(REG_DDR3_MR1_ADDR, reg);	/* 0x15D4 - DDR3 MR1 Register */  in ddr3_write_leveling_sw()
762 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
786 			reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_sw()
806 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw()
815 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
826 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
833 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw()
844 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw()
853 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw()
864 		reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_sw()
896 		reg_write(REG_DUNIT_CTRL_LOW_ADDR,  in ddr3_write_leveling_sw_reg_dimm()
921 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
930 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
943 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
951 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
967 				reg_write(REG_SDRAM_OPERATION_ADDR, reg);	/* 0x1418 - SDRAM Operation Register */  in ddr3_write_leveling_sw_reg_dimm()
994 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1003 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1021 			reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1038 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1047 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1058 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1065 	reg_write(REG_DRAM_TRAINING_2_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1076 			reg_write(REG_DDR3_MR1_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1085 			reg_write(REG_SDRAM_OPERATION_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1096 		reg_write(REG_DUNIT_CTRL_LOW_ADDR, reg);  in ddr3_write_leveling_sw_reg_dimm()
1169 	reg_write(REG_SDRAM_ODT_CTRL_HIGH_ADDR, reg);  in ddr3_write_leveling_single_cs()
1181 	reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_single_cs()
1199 	reg_write(REG_TRAINING_WL_ADDR, reg);  in ddr3_write_leveling_single_cs()
1245 			reg_write(REG_TRAINING_WL_ADDR, reg);	/* 0x16AC  */  in ddr3_write_leveling_single_cs()
1330 	reg_write(REG_SDRAM_ODT_CTRL_HIGH_ADDR, reg);  in ddr3_write_leveling_single_cs()
1357 	reg_write(REG_PHY_REGISTRY_FILE_ACCESS_ADDR, reg);	/* 0x16A0 */  in ddr3_write_ctrl_pup_reg()
1359 	reg_write(REG_PHY_REGISTRY_FILE_ACCESS_ADDR, reg);	/* 0x16A0 */  in ddr3_write_ctrl_pup_reg()