Lines Matching refs:DEBUG_INIT_S
283 DEBUG_INIT_S("DDR3 Training Error: Bad sample at reset"); in ddr3_init()
285 DEBUG_INIT_S("DDR3 Training Error: Bad DIMM setup"); in ddr3_init()
287 DEBUG_INIT_S("DDR3 Training Error: Max CS limit"); in ddr3_init()
289 DEBUG_INIT_S("DDR3 Training Error: Max enable CS limit"); in ddr3_init()
291 DEBUG_INIT_S("DDR3 Training Error: Bad R-DIMM setup"); in ddr3_init()
293 DEBUG_INIT_S("DDR3 Training Error: TWSI failure"); in ddr3_init()
295 DEBUG_INIT_S("DDR3 Training Error: DIMM type no match"); in ddr3_init()
297 DEBUG_INIT_S("DDR3 Training Error: TWSI bad type"); in ddr3_init()
299 DEBUG_INIT_S("DDR3 Training Error: bus width no match"); in ddr3_init()
371 DEBUG_INIT_S("4\n"); in ddr3_init_main()
415 DEBUG_INIT_S("DDR3 Training Sequence - FAILED - Wrong Sample at Reset Configurations\n"); in ddr3_init_main()
454 DEBUG_INIT_S("DDR3 Training Sequence - 2nd boot - Skip\n"); in ddr3_init_main()
490 DEBUG_INIT_S("DDR3 Training Sequence - DRAM bus width 32Bit\n"); in ddr3_init_main()
506 DEBUG_INIT_S("DDR3 Training Sequence - FAILED (ddr3 Dunit Setup)\n"); in ddr3_init_main()
676 DEBUG_INIT_S("DDR3 Training Sequence - Ended Successfully (S)\n"); in ddr3_init_main()
678 DEBUG_INIT_S("DDR3 Training Sequence - Ended Successfully\n"); in ddr3_init_main()