Lines Matching full:dqs
125 * Desc: Execute the DQS centralization RX phase.
135 DEBUG_DQS_S("DDR3 - DQS Centralization RX - Starting procedure\n"); in ddr3_dqs_centralization_rx()
144 DEBUG_DQS_S("DDR3 - DQS Centralization RX - SW Override Enabled\n"); in ddr3_dqs_centralization_rx()
152 DEBUG_DQS_FULL_C("DDR3 - DQS Centralization RX - CS - ", in ddr3_dqs_centralization_rx()
165 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization RX - ECC Mux Enabled\n"); in ddr3_dqs_centralization_rx()
167 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization RX - ECC Mux Disabled\n"); in ddr3_dqs_centralization_rx()
169 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization RX - Find all limits\n"); in ddr3_dqs_centralization_rx()
176 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization RX - Start calculating center\n"); in ddr3_dqs_centralization_rx()
207 * Desc: Execute the DQS centralization TX phase.
217 DEBUG_DQS_S("DDR3 - DQS Centralization TX - Starting procedure\n"); in ddr3_dqs_centralization_tx()
226 DEBUG_DQS_S("DDR3 - DQS Centralization TX - SW Override Enabled\n"); in ddr3_dqs_centralization_tx()
234 DEBUG_DQS_FULL_C("DDR3 - DQS Centralization TX - CS - ", in ddr3_dqs_centralization_tx()
245 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization TX - ECC Mux Enabled\n"); in ddr3_dqs_centralization_tx()
247 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization TX - ECC Mux Disabled\n"); in ddr3_dqs_centralization_tx()
249 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization TX - Find all limits\n"); in ddr3_dqs_centralization_tx()
256 DEBUG_DQS_FULL_S("DDR3 - DQS Centralization TX - Start calculating center\n"); in ddr3_dqs_centralization_tx()
323 DEBUG_DQS_FULL_S("DDR3 - DQS Find Limits - Starting Find ADLL Limits\n"); in ddr3_find_adll_limits()
354 DEBUG_DQS_FULL_C("DDR3 - DQS Find Limits - Victim DQ - ", in ddr3_find_adll_limits()
389 DEBUG_DQS_FULL_C("DDR3 - DQS Find Limits - Setting ADLL to ", in ddr3_find_adll_limits()
427 DEBUG_DQS_FULL_C("DDR3 - DQS Find Limits - UnlockPup: ", in ddr3_find_adll_limits()
429 DEBUG_DQS_FULL_C("DDR3 - DQS Find Limits - NewUnlockPup: ", in ddr3_find_adll_limits()
435 DEBUG_DQS_FULL_C("DDR3 - DQS Find Limits - Skipping pup ", in ddr3_find_adll_limits()
451 DEBUG_DQS_S("DDR3 - DQS Find Limits - PASS to FAIL: CS - "); in ddr3_find_adll_limits()
566 DEBUG_DQS_S("DDR3 - DQS Find Limits - FAIL to PASS: CS - "); in ddr3_find_adll_limits()
611 DEBUG_DQS_FULL_S("DDR3 - DQS Find Limits - found PUP limit\n"); in ddr3_find_adll_limits()
617 * one phase - ADLL) dqs RX / TX delay (for all un in ddr3_find_adll_limits()
631 DEBUG_DQS_C("DDR3 - DQS Find Limits - Pups that didn't reached end of the state machine: ", in ddr3_find_adll_limits()
639 DEBUG_DQS_S("DDR3 - DQS Find Limits - Got FAIL for the complete range on pup - "); in ddr3_find_adll_limits()
661 DEBUG_DQS_S("DDR3 - DQS Find Limits - DQ values per victim results:\n"); in ddr3_find_adll_limits()
767 DEBUG_DQS_S("DDR3 - DQS TX - Find Limits - DQ values Summary:\n"); in ddr3_find_adll_limits()
769 DEBUG_DQS_S("DDR3 - DQS RX - Find Limits - DQ values Summary:\n"); in ddr3_find_adll_limits()
787 DEBUG_DQS_S("DDR3 - DQS TX - Find Limits - DQ values Summary:\n"); in ddr3_find_adll_limits()
789 DEBUG_DQS_S("DDR3 - DQS RX - Find Limits - DQ values Summary:\n"); in ddr3_find_adll_limits()
797 DEBUG_DQS_S("DDR3 - DQS"); in ddr3_find_adll_limits()
812 DEBUG_DQS_S("DDR3 - DQS Find Limits - Ended\n"); in ddr3_find_adll_limits()
831 DEBUG_DQS_FULL_S("DDR3 - DQS Check Win Limits - Starting\n"); in ddr3_check_window_limits()
834 DEBUG_DQS_S("DDR3 - DQS Check Win Limits - Pup "); in ddr3_check_window_limits()
852 DEBUG_DQS_S("DDR3 - DQS Check Win Limits - Pup "); in ddr3_check_window_limits()
859 DEBUG_DQS_S("DDR3 - DQS Check Win Limits - Pup "); in ddr3_check_window_limits()
869 DEBUG_DQS_FULL_S("DDR3 - DQS Check Win Limits - Pup "); in ddr3_check_window_limits()
923 DEBUG_DQS_S("DDR3 - DQS Center Calc - Entering special pattern I for Low limit search\n"); in ddr3_center_calc()
932 DEBUG_DQS_S("DDR3 - DQS Center Calc - Entering special pattern II for High limit search\n"); in ddr3_center_calc()
966 DEBUG_DQS_S("DDR3 - DQS - Special Pattern I Search - Starting\n"); in ddr3_special_pattern_i_search()
1011 DEBUG_DQS_S("DDR3 - DQS - Special I - ADLL value is: "); in ddr3_special_pattern_i_search()
1020 DEBUG_DQS_S("DDR3 - DQS - Special I - Some Pup passed!\n"); in ddr3_special_pattern_i_search()
1041 ("DDR3 - DQS - Special I - Pup - ", in ddr3_special_pattern_i_search()
1057 ("DDR3 - DQS - Special I - Pup - ", in ddr3_special_pattern_i_search()
1073 * dqs RX delay in ddr3_special_pattern_i_search()
1082 DEBUG_DQS_C("DDR3 - DQS - Special I - reach maximum - lock pup ", in ddr3_special_pattern_i_search()
1127 DEBUG_DQS_S("DDR3 - DQS - Special Pattern II Search - Starting\n"); in ddr3_special_pattern_ii_search()
1167 DEBUG_DQS_S("DDR3 - DQS - Special II - ADLL value is "); in ddr3_special_pattern_ii_search()
1176 DEBUG_DQS_S("DDR3 - DQS - Special II - Some Pup passed!\n"); in ddr3_special_pattern_ii_search()
1194 DEBUG_DQS_C("DDR3 - DQS - Special II - Pup - ", in ddr3_special_pattern_ii_search()
1209 ("DDR3 - DQS - Special II - Pup - ", in ddr3_special_pattern_ii_search()
1225 * dqs RX delay in ddr3_special_pattern_ii_search()
1233 DEBUG_DQS_C("DDR3 - DQS - Special II - reach maximum - lock pup ", in ddr3_special_pattern_ii_search()
1255 * Desc: Set to HW the DQS centralization phase results.
1273 DEBUG_DQS_RESULTS_C("DDR3 - DQS TX - Set Dqs Centralization Results - CS: ", in ddr3_set_dqs_centralization_results()
1276 DEBUG_DQS_RESULTS_C("DDR3 - DQS RX - Set Dqs Centralization Results - CS: ", in ddr3_set_dqs_centralization_results()
1303 …DEBUG_DQS_RESULTS_S("DDR3 - DQS - Setting ADLL value for Pup to MIN (since it was lower than 0)\n"… in ddr3_set_dqs_centralization_results()
1308 …DEBUG_DQS_RESULTS_S("DDR3 - DQS - Setting ADLL value for Pup to MAX (since it was higher than 31)\… in ddr3_set_dqs_centralization_results()