marvell/axp/ddr3_axp_mc_static.h

15 	{0x00001404, 0x3630b800},	/*Dunit Control Low Register */
21 	{0x00001410, 0x040F0001},	/*DDR SDRAM Address Control Register */
23 	{0x00001410, 0x040F0000},	/*DDR SDRAM Open Pages Control Register */
26 	{0x00001414, 0x00000000},	/*DDR SDRAM Open Pages Control Register */
29 	{0x00001424, 0x0000D3FF},	/*Dunit Control High Register */
30 	{0x00001428, 0x000F8830},	/*Dunit Control High Register */
31 	{0x0000142C, 0x214C2F38},	/*Dunit Control High Register */
38 	{0x00001494, 0x00010000},	/*DDR SDRAM ODT Control (Low) Register */
39 	{0x00001498, 0x00000000},	/*DDR SDRAM ODT Control (High) Register */
40 	{0x0000149C, 0x00000301},	/*DDR Dunit ODT Control Register */
42 	{0x000014C0, 0x192434e9},	/* DRAM address and Control Driving Strenght  */
73 	{0x00001404, 0x3630b800},	/*Dunit Control Low Register */
79 	{0x00001410, 0x040F0001},	/*DDR SDRAM Address Control Register */
81 	{0x00001410, 0x040F000C},	/*DDR SDRAM Open Pages Control Register */
84 	{0x00001414, 0x00000000},	/*DDR SDRAM Open Pages Control Register */
87 	{0x00001424, 0x0000D3FF},	/*Dunit Control High Register */
88 	{0x00001428, 0x000F8830},	/*Dunit Control High Register */
89 	{0x0000142C, 0x214C2F38},	/*Dunit Control High Register */
96 	{0x00001494, 0x00010000},	/*DDR SDRAM ODT Control (Low) Register */
97 	{0x00001498, 0x00000000},	/*DDR SDRAM ODT Control (High) Register */
98 	{0x0000149C, 0x00000301},	/*DDR Dunit ODT Control Register */
100 	{0x000014C0, 0x192434e9},	/* DRAM address and Control Driving Strenght  */
131 	{0x00001404, 0x3630B840},	/*Dunit Control Low Register */
134 	{0x00001410, 0x040F0000},	/*DDR SDRAM Address Control Register */
135 	{0x00001414, 0x00000000},	/*DDR SDRAM Open Pages Control Register */
139 	{0x00001424, 0x0100D3FF},	/*Dunit Control High Register */
140 	{0x00001428, 0x000D6720},	/*Dunit Control High Register */
141 	{0x0000142C, 0x014C2F38},	/*Dunit Control High Register */
144 	{0x00001494, 0x00010000},	/*DDR SDRAM ODT Control (Low) Register */
145 	{0x00001498, 0x00000000},	/*DDR SDRAM ODT Control (High) Register */
146 	{0x0000149C, 0x00000301},	/*DDR Dunit ODT Control Register */
152 	{0x000014C0, 0x192424C8},	/* DRAM address and Control Driving Strenght  */
183 	{0x00001404, 0x3630B040},	/*Dunit Control Low Register */
189 	{0x00001410, 0x040F0001},	/*DDR SDRAM Address Control Register */
191 	{0x00001410, 0x040F0000},	/*DDR SDRAM Open Pages Control Register */
194 	{0x00001414, 0x00000000},	/*DDR SDRAM Open Pages Control Register */
197 	{0x00001424, 0x0100D1FF},	/*Dunit Control High Register */
198 	{0x00001428, 0x000F8830},	/*Dunit Control High Register */
199 	{0x0000142C, 0x214C2F38},	/*Dunit Control High Register */
205 	{0x00001494, 0x00010000},	/*DDR SDRAM ODT Control (Low) Register */
206 	{0x00001498, 0x00000000},	/*DDR SDRAM ODT Control (High) Register */
207 	{0x0000149C, 0x00000301},	/*DDR Dunit ODT Control Register */
209 	{0x000014C0, 0x192424C8},	/* DRAM address and Control Driving Strenght  */
241 	{0x00001404, 0x3630B840},	/*Dunit Control Low Register */
244 	{0x00001410, 0x040F0000},	/*DDR SDRAM Address Control Register */
245 	{0x00001414, 0x00000000},	/*DDR SDRAM Open Pages Control Register */
249 	{0x00001424, 0x0100F1FF},	/*Dunit Control High Register */
250 	{0x00001428, 0x000D6720},	/*Dunit Control High Register */
251 	{0x0000142C, 0x014C2F38},	/*Dunit Control High Register */
254 	{0x00001494, 0x00010000},	/*DDR SDRAM ODT Control (Low) Register */
255 	{0x00001498, 0x00000000},	/*DDR SDRAM ODT Control (High) Register */
256 	{0x0000149C, 0x00000301},	/*DDR Dunit ODT Control Register */
258 	{0x000014C0, 0x192424C8},	/* DRAM address and Control Driving Strenght  */