Lines Matching full:engine

19 /* XOR Engine Control Register Map */
26 /* XOR Engine Interrupt Register Map */
32 /* XOR Engine Descriptor Register Map */
40 /* XOR Engine ECC/Mem_init Register Map */
51 /* XOR Engine Debug Register Map */
56 /* XOR Engine Channel Arbiter Register */
60 /* XOR Engine [0..1] Configuration Registers */
82 /* XOR Engine [0..1] Activation Registers */
97 /* XOR Engine Interrupt Cause Register (XEICR) */
105 /* XOR Engine Error Cause Register (XEECR) */
109 /* XOR Engine Error Address Register (XEEAR) */
113 /* XOR Engine [0..1] Next Descriptor Pointer Register */
118 /* XOR Engine [0..1] Current Descriptor Pointer Register */
123 /* XOR Engine [0..1] Byte Count Register */
127 /* XOR Engine [0..1] Destination Pointer Register */
134 /* XOR Engine[0..1] Block Size Registers */
140 /* XOR Engine Timer Mode Control Register (XETMCR) */
150 /* XOR Engine Timer Mode Initial Value Register (XETMIVR) */
155 /* XOR Engine Timer Mode Current Value Register (XETMCVR) */
160 /* XOR Engine Initial Value Register Low (XEIVRL) */
164 /* XOR Engine Initial Value Register High (XEIVRH) */
168 /* XOR Engine Debug Register (XEDBR) */
174 /* XOR Engine address decode registers.	*/
180 /* XOR Engine Address Decoding Register Map */
192 /* XOR Engine [0..1] Window Control Registers */
204 /* XOR Engine Base Address Registers (XEBARx) */
212 /* XOR Engine Size Mask Registers (XESMRx) */
217 /* XOR Engine High Address Remap Register (XEHARRx1) */
224 /* XOR Engine [0..1] Address Override Control Register */