marvell/a38x/mv_ddr_spd.h

1 /* SPDX-License-Identifier: GPL-2.0 */
12  * Based on JEDEC Standard No. 21-C, 4.1.2.L-4:
18 /* block 1: module specific parameters sub-block */
20 /* block 1: hybrid memory parameters sub-block */
121 		union { /* module nominal voltage, vdd */
185 		unsigned char byte_28; /* min active to precharge delay time (t ras min), l-s-byte, mtb */
186 		unsigned char byte_29; /* min active to active/refresh delay time (t rc min), l-s-byte, mtb */
187 		unsigned char byte_30; /* min refresh recovery delay time (t rfc1 min), l-s-byte, mtb */
188 		unsigned char byte_31; /* min refresh recovery delay time (t rfc1 min), m-s-byte, mtb */
189 		unsigned char byte_32; /* min refresh recovery delay time (t rfc2 min), l-s-byte, mtb */
190 		unsigned char byte_33; /* min refresh recovery delay time (t rfc2 min), m-s-byte, mtb */
191 		unsigned char byte_34; /* min refresh recovery delay time (t rfc4 min), l-s-byte, mtb */
192 		unsigned char byte_35; /* min refresh recovery delay time (t rfc4 min), m-s-byte, mtb */
200 		unsigned char byte_37; /* min four activate window delay time (t faw min), l-s-byte, mtb */
218 					t_wtr_l_min_msn:4; /* t wtr l min most significant nibble */
222 		unsigned char byte_45; /* min write to read time (t wtr l min), same bank group, mtb */
239 		unsigned char byte_126; /* crc for base configuration section, l-s-byte */
240 		unsigned char byte_127; /* crc for base configuration section, m-s-byte */