Lines Matching refs:interface_params
192 if (tm->interface_params[0]. in ddr3_tip_pad_inv()
204 if (tm->interface_params[0].as_bus_params[sphy]. in ddr3_tip_pad_inv()
286 data = (tm->interface_params[if_id].bus_width == in ddr3_tip_configure_cs()
292 mem_index = tm->interface_params[if_id].memory_size; in ddr3_tip_configure_cs()
351 enum mv_ddr_freq freq = tm->interface_params[0].memory_freq; in hws_ddr3_tip_init_controller()
373 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
385 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
473 (tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
482 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
511 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
514 tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
553 ((tm->interface_params[if_id]. in hws_ddr3_tip_init_controller()
590 timing = tm->interface_params[if_id].timing; in hws_ddr3_tip_init_controller()
684 data_value |= tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
687 if (tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
693 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
695 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
700 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
702 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
707 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
709 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
714 if ((tm->interface_params[if_id].as_bus_params[bus_cnt]. in ddr3_tip_rev2_rank_control()
716 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev2_rank_control()
738 if ((tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
740 tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
742 (tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
744 tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
751 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
753 data_value |= tm->interface_params[if_id]. in ddr3_tip_rev3_rank_control()
1215 enum mv_ddr_timing timing = tm->interface_params[if_id].timing; in ddr3_tip_freq_set()
1253 tm->interface_params[if_id].speed_bin_index; in ddr3_tip_freq_set()
1254 if (tm->interface_params[if_id].memory_freq == in ddr3_tip_freq_set()
1257 tm->interface_params[if_id].cas_l; in ddr3_tip_freq_set()
1259 tm->interface_params[if_id].cas_wl; in ddr3_tip_freq_set()
1293 tm->interface_params[if_id]. in ddr3_tip_freq_set()
1633 speed_bin_index = tm->interface_params[if_id].speed_bin_index; in ddr3_tip_set_timing()
1634 memory_size = tm->interface_params[if_id].memory_size; in ddr3_tip_set_timing()
1635 page_size = mv_ddr_page_size_get(tm->interface_params[if_id].bus_width, memory_size); in ddr3_tip_set_timing()
1640 t_refi = (tm->interface_params[if_id].interface_temp == MV_DDR_TEMP_HIGH) ? TREFI_HIGH : TREFI_LOW; in ddr3_tip_set_timing()
1776 tm->interface_params[if_id]. in ddr3_tip_write_cs_result()
2014 enum mv_ddr_freq freq = tm->interface_params[0].memory_freq; in ddr3_tip_ddr3_training_main_flow()
2292 interface_params[first_active_if]. in ddr3_tip_ddr3_training_main_flow()
2296 tm->interface_params[first_active_if]. in ddr3_tip_ddr3_training_main_flow()
2342 interface_params[first_active_if]. in ddr3_tip_ddr3_training_main_flow()
2358 ret = mv_ddr_rl_dqs_burst(0, 0, tm->interface_params[0].memory_freq); in ddr3_tip_ddr3_training_main_flow()
2570 tm->interface_params[if_id]. in ddr3_tip_enable_init_sequence()
2665 return (tm->interface_params[if_id].bus_width == in hws_ddr3_get_device_width()
2673 if (tm->interface_params[if_id].memory_size >= in hws_ddr3_get_device_size()
2677 tm->interface_params[if_id].memory_size)); in hws_ddr3_get_device_size()
2680 return 1 << tm->interface_params[if_id].memory_size; in hws_ddr3_get_device_size()
2734 physical_mem_size = mem_size[tm->interface_params[0].memory_size]; in hws_ddr3_cs_base_adr_calc()