Lines Matching refs:MV_OK
225 return MV_OK; in ddr3_tip_pad_inv()
273 return MV_OK; in ddr3_tip_tune_training_params()
329 return MV_OK; in ddr3_tip_configure_cs()
670 return MV_OK; in hws_ddr3_tip_init_controller()
727 return MV_OK; in ddr3_tip_rev2_rank_control()
760 return MV_OK; in ddr3_tip_rev3_rank_control()
838 return (status == 1) ? MV_OK : MV_NOT_INITIALIZED; in ddr3_tip_validate_algo_components()
872 return MV_OK; in ddr3_pre_algo_config()
881 if (MV_OK != status) { in ddr3_post_algo_config()
897 return MV_OK; in ddr3_post_algo_config()
905 int status = MV_OK; in hws_ddr3_tip_run_alg()
908 if (MV_OK != status) { in hws_ddr3_tip_run_alg()
922 if (status != MV_OK) { in hws_ddr3_tip_run_alg()
930 if (MV_OK != status) { in hws_ddr3_tip_run_alg()
944 int ret = MV_OK, ret_tune = MV_OK; in odt_test()
969 if (ret_tune != MV_OK) { in odt_test()
972 ret = (ret == MV_OK) ? ret_tune : ret; in odt_test()
996 return MV_OK; in ddr3_tip_if_write()
1007 return MV_OK; in ddr3_tip_if_read()
1041 if (ret != MV_OK) in ddr3_tip_if_polling()
1059 return (is_fail == 0) ? MV_OK : MV_FAIL; in ddr3_tip_if_polling()
1117 return MV_OK; in ddr3_tip_bus_read_modify_write()
1179 MAX_POLLING_ITERATIONS) != MV_OK) { in adll_calibration()
1193 return MV_OK; in adll_calibration()
1346 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_freq_set()
1465 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_freq_set()
1492 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_freq_set()
1503 SDRAM_OP_REG, MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_freq_set()
1580 return MV_OK; in ddr3_tip_freq_set()
1613 return MV_OK; in ddr3_tip_write_odt()
1757 return MV_OK; in ddr3_tip_set_timing()
1798 return MV_OK; in ddr3_tip_write_cs_result()
1823 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_write_mrs_cmd()
1829 return MV_OK; in ddr3_tip_write_mrs_cmd()
1868 return MV_OK; in ddr3_tip_reset_fifo_ptr()
1940 return MV_OK; in ddr3_tip_ddr3_reset_phy_regs()
1973 return MV_OK; in ddr3_tip_restore_dunit_regs()
1997 return MV_OK; in ddr3_tip_adll_regs_bypass()
2009 int ret = MV_OK; in ddr3_tip_ddr3_training_main_flow()
2066 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2076 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2099 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2114 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2131 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2161 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2182 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2199 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2224 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2239 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2256 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2275 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2300 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2315 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2329 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2346 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2361 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2383 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2403 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2424 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2446 if (ret != MV_OK) { in ddr3_tip_ddr3_training_main_flow()
2465 return MV_OK; in ddr3_tip_ddr3_training_main_flow()
2499 if (status != MV_OK) { in ddr3_tip_ddr3_auto_tune()
2519 ((status == MV_OK) && (is_auto_tune_fail == 1))) { in ddr3_tip_ddr3_auto_tune()
2531 if ((status != MV_OK) || (is_auto_tune_fail == 1)) in ddr3_tip_ddr3_auto_tune()
2534 return MV_OK; in ddr3_tip_ddr3_auto_tune()
2557 MAX_POLLING_ITERATIONS) != MV_OK) { in ddr3_tip_enable_init_sequence()
2583 return (is_fail == 0) ? MV_OK : MV_FAIL; in ddr3_tip_enable_init_sequence()
2590 return MV_OK; in ddr3_tip_register_dq_table()
2710 return MV_OK; in hws_ddr3_calc_mem_cs_size()
2724 if (hws_ddr3_calc_mem_cs_size(if_id, cs, &cs_mem_size) != MV_OK) in hws_ddr3_cs_base_adr_calc()
2758 return MV_OK; in hws_ddr3_cs_base_adr_calc()