113 	u32 if_id, reg_addr, data_value, bus_id;  in ddr3_tip_reg_dump()  local
137 			for (bus_id = 0;  in ddr3_tip_reg_dump()
138 			     bus_id < octets_per_if_num;  in ddr3_tip_reg_dump()
139 			     bus_id++) {  in ddr3_tip_reg_dump()
140 				VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in ddr3_tip_reg_dump()
143 					      ACCESS_TYPE_UNICAST, bus_id,  in ddr3_tip_reg_dump()
148 			for (bus_id = 0;  in ddr3_tip_reg_dump()
149 			     bus_id < octets_per_if_num;  in ddr3_tip_reg_dump()
150 			     bus_id++) {  in ddr3_tip_reg_dump()
151 				VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in ddr3_tip_reg_dump()
154 					      ACCESS_TYPE_UNICAST, bus_id,  in ddr3_tip_reg_dump()
513 	u8 if_id = 0, csindex = 0, bus_id = 0, idx = 0;  in ddr3_tip_print_stability_log()  local
526 			VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in ddr3_tip_print_stability_log()
565 			for (bus_id = 0; bus_id < MAX_BUS_NUM; bus_id++) {  in ddr3_tip_print_stability_log()
567 				VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in ddr3_tip_print_stability_log()
570 						  bus_id, DDR_PHY_DATA,  in ddr3_tip_print_stability_log()
578 						  bus_id, DDR_PHY_DATA,  in ddr3_tip_print_stability_log()
597 						  ACCESS_TYPE_UNICAST, bus_id,  in ddr3_tip_print_stability_log()
610 						  ACCESS_TYPE_UNICAST, bus_id,  in ddr3_tip_print_stability_log()
616 						  ACCESS_TYPE_UNICAST, bus_id,  in ddr3_tip_print_stability_log()
623 						  ACCESS_TYPE_UNICAST, bus_id,  in ddr3_tip_print_stability_log()
635 							  bus_id, DDR_PHY_DATA,  in ddr3_tip_print_stability_log()
645 							  bus_id, DDR_PHY_DATA,  in ddr3_tip_print_stability_log()
676 	u32 if_id = 0, bus_id = 0;  in ddr3_tip_read_adll_value()  local
686 		for (bus_id = 0; bus_id < octets_per_if_num;  in ddr3_tip_read_adll_value()
687 		     bus_id++) {  in ddr3_tip_read_adll_value()
688 			VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in ddr3_tip_read_adll_value()
691 						       bus_id,  in ddr3_tip_read_adll_value()
695 				   octets_per_if_num + bus_id] =  in ddr3_tip_read_adll_value()
709 	u32 if_id = 0, bus_id = 0;  in ddr3_tip_write_adll_value()  local
720 		for (bus_id = 0; bus_id < octets_per_if_num;  in ddr3_tip_write_adll_value()
721 		     bus_id++) {  in ddr3_tip_write_adll_value()
722 			VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in ddr3_tip_write_adll_value()
725 					  bus_id];  in ddr3_tip_write_adll_value()
730 							bus_id, DDR_PHY_DATA,  in ddr3_tip_write_adll_value()
745 	u32 if_id = 0, bus_id = 0;  in read_phase_value()  local
752 		for (bus_id = 0; bus_id < octets_per_if_num; bus_id++) {  in read_phase_value()
753 			VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in read_phase_value()
756 						       bus_id,  in read_phase_value()
759 			pup_values[if_id * octets_per_if_num + bus_id] = data_value & mask;  in read_phase_value()
772 	u32 if_id = 0, bus_id = 0;  in write_leveling_value()  local
780 		for (bus_id = 0 ; bus_id < octets_per_if_num ; bus_id++) {  in write_leveling_value()
781 			VALIDATE_BUS_ACTIVE(tm->bus_act_mask, bus_id);  in write_leveling_value()
782 			data = pup_values[if_id * octets_per_if_num + bus_id] +  in write_leveling_value()
783 			       pup_ph_values[if_id * octets_per_if_num + bus_id];  in write_leveling_value()
788 							bus_id,  in write_leveling_value()