Lines Matching refs:timeout
24 int timeout = 1000; in set_wait_for_bits_clear() local
30 timeout--; in set_wait_for_bits_clear()
32 if (timeout <= 0) in set_wait_for_bits_clear()
57 int timeout; in fsl_ddr_set_memctl_regs() local
349 timeout = 40; in fsl_ddr_set_memctl_regs()
352 (timeout > 0)) { in fsl_ddr_set_memctl_regs()
354 timeout--; in fsl_ddr_set_memctl_regs()
356 if (timeout <= 0) { in fsl_ddr_set_memctl_regs()
400 timeout = 40; in fsl_ddr_set_memctl_regs()
402 (timeout > 0)) { in fsl_ddr_set_memctl_regs()
404 timeout--; in fsl_ddr_set_memctl_regs()
406 if (timeout <= 0) { in fsl_ddr_set_memctl_regs()
459 timeout = ((total_gb_size_per_controller << (6 - bus_width)) * 100 / in fsl_ddr_set_memctl_regs()
463 debug("Need to wait up to %d * 10ms\n", timeout); in fsl_ddr_set_memctl_regs()
467 (timeout >= 0)) { in fsl_ddr_set_memctl_regs()
469 timeout--; in fsl_ddr_set_memctl_regs()
472 if (timeout <= 0) in fsl_ddr_set_memctl_regs()
537 timeout = 100; in fsl_ddr_set_memctl_regs()
538 while (timeout > 0 && (mtcr & BIST_CR_EN)) { in fsl_ddr_set_memctl_regs()
540 timeout--; in fsl_ddr_set_memctl_regs()
543 if (timeout <= 0) in fsl_ddr_set_memctl_regs()