Lines Matching +full:bottom +full:- +full:speed
1 // SPDX-License-Identifier: GPL-2.0
18 * --- ----- ------
28 * Reorder Table to be linear by stripping the bottom
37 /* Bottom 5 bits up to the top. */ in compute_ranksize()
46 * Convert a two-nibble BCD value into a cycle time.
47 * While the spec calls for nano-seconds, picos are returned.
148 * shortest SPD-defined CAS latency.
152 * Do this by finding in the standard speed bin table the longest
160 * CAS latency de-rating based upon values JEDEC Standard No. 79-2C
161 * Table 40, "DDR2 SDRAM stanadard speed bins and tCK, tRCD, tRP, tRAS,
210 if (spd->mem_type) { in ddr_compute_dimm_parameters()
211 if (spd->mem_type != SPD_MEMTYPE_DDR2) { in ddr_compute_dimm_parameters()
231 memset(pdimm->mpart, 0, sizeof(pdimm->mpart)); in ddr_compute_dimm_parameters()
232 memcpy(pdimm->mpart, spd->mpart, sizeof(pdimm->mpart) - 1); in ddr_compute_dimm_parameters()
235 pdimm->n_ranks = (spd->mod_ranks & 0x7) + 1; in ddr_compute_dimm_parameters()
236 pdimm->rank_density = compute_ranksize(spd->mem_type, spd->rank_dens); in ddr_compute_dimm_parameters()
237 pdimm->capacity = pdimm->n_ranks * pdimm->rank_density; in ddr_compute_dimm_parameters()
238 pdimm->data_width = spd->dataw; in ddr_compute_dimm_parameters()
239 pdimm->primary_sdram_width = spd->primw; in ddr_compute_dimm_parameters()
240 pdimm->ec_sdram_width = spd->ecw; in ddr_compute_dimm_parameters()
243 switch (spd->dimm_type) { in ddr_compute_dimm_parameters()
248 pdimm->registered_dimm = 1; in ddr_compute_dimm_parameters()
256 pdimm->registered_dimm = 0; in ddr_compute_dimm_parameters()
261 printf("unknown dimm_type 0x%02X\n", spd->dimm_type); in ddr_compute_dimm_parameters()
266 pdimm->n_row_addr = spd->nrow_addr; in ddr_compute_dimm_parameters()
267 pdimm->n_col_addr = spd->ncol_addr; in ddr_compute_dimm_parameters()
268 pdimm->n_banks_per_sdram_device = spd->nbanks; in ddr_compute_dimm_parameters()
269 pdimm->edc_config = spd->config; in ddr_compute_dimm_parameters()
270 pdimm->burst_lengths_bitmask = spd->burstl; in ddr_compute_dimm_parameters()
277 pdimm->tckmin_x_ps in ddr_compute_dimm_parameters()
278 = convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle); in ddr_compute_dimm_parameters()
279 pdimm->tckmin_x_minus_1_ps in ddr_compute_dimm_parameters()
280 = convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle2); in ddr_compute_dimm_parameters()
281 pdimm->tckmin_x_minus_2_ps in ddr_compute_dimm_parameters()
282 = convert_bcd_tenths_to_cycle_time_ps(spd->clk_cycle3); in ddr_compute_dimm_parameters()
284 pdimm->tckmax_ps = convert_bcd_tenths_to_cycle_time_ps(spd->tckmax); in ddr_compute_dimm_parameters()
293 pdimm->caslat_x = __ilog2(spd->cas_lat); in ddr_compute_dimm_parameters()
294 pdimm->caslat_x_minus_1 = __ilog2(spd->cas_lat in ddr_compute_dimm_parameters()
295 & ~(1 << pdimm->caslat_x)); in ddr_compute_dimm_parameters()
296 pdimm->caslat_x_minus_2 = __ilog2(spd->cas_lat in ddr_compute_dimm_parameters()
297 & ~(1 << pdimm->caslat_x) in ddr_compute_dimm_parameters()
298 & ~(1 << pdimm->caslat_x_minus_1)); in ddr_compute_dimm_parameters()
301 pdimm->caslat_lowest_derated = compute_derated_DDR2_CAS_latency( in ddr_compute_dimm_parameters()
305 pdimm->trcd_ps = spd->trcd * 250; in ddr_compute_dimm_parameters()
306 pdimm->trp_ps = spd->trp * 250; in ddr_compute_dimm_parameters()
307 pdimm->tras_ps = spd->tras * 1000; in ddr_compute_dimm_parameters()
309 pdimm->twr_ps = spd->twr * 250; in ddr_compute_dimm_parameters()
310 pdimm->twtr_ps = spd->twtr * 250; in ddr_compute_dimm_parameters()
311 pdimm->trfc_ps = compute_trfc_ps_from_spd(spd->trctrfc_ext, spd->trfc); in ddr_compute_dimm_parameters()
313 pdimm->trrd_ps = spd->trrd * 250; in ddr_compute_dimm_parameters()
314 pdimm->trc_ps = compute_trc_ps_from_spd(spd->trctrfc_ext, spd->trc); in ddr_compute_dimm_parameters()
316 pdimm->refresh_rate_ps = determine_refresh_rate_ps(spd->refresh); in ddr_compute_dimm_parameters()
318 pdimm->tis_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_setup); in ddr_compute_dimm_parameters()
319 pdimm->tih_ps = convert_bcd_hundredths_to_cycle_time_ps(spd->ca_hold); in ddr_compute_dimm_parameters()
320 pdimm->tds_ps in ddr_compute_dimm_parameters()
321 = convert_bcd_hundredths_to_cycle_time_ps(spd->data_setup); in ddr_compute_dimm_parameters()
322 pdimm->tdh_ps in ddr_compute_dimm_parameters()
323 = convert_bcd_hundredths_to_cycle_time_ps(spd->data_hold); in ddr_compute_dimm_parameters()
325 pdimm->trtp_ps = spd->trtp * 250; in ddr_compute_dimm_parameters()
326 pdimm->tdqsq_max_ps = spd->tdqsq * 10; in ddr_compute_dimm_parameters()
327 pdimm->tqhs_ps = spd->tqhs * 10; in ddr_compute_dimm_parameters()