drivers/cpu/riscv_cpu.c

1 // SPDX-License-Identifier: GPL-2.0+
10 #include <dm/device-internal.h>
21 		return -ENOSPC;  in riscv_cpu_get_desc()
32 	dev_read_u32(dev, "clock-frequency", (u32 *)&info->cpu_freq);  in riscv_cpu_get_info()
34 	mmu = dev_read_string(dev, "mmu-type");  in riscv_cpu_get_info()
36 		info->features |= BIT(CPU_FEAT_MMU);  in riscv_cpu_get_info()
46 	ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {  in riscv_cpu_get_count()
66 	plat->cpu_id = dev_read_addr(dev);  in riscv_cpu_bind()
68 	ret = dev_read_u32(dev, "timebase-frequency", &plat->timebase_freq);  in riscv_cpu_bind()
71 		dev_read_u32(dev->parent, "timebase-frequency",  in riscv_cpu_bind()
72 			     &plat->timebase_freq);  in riscv_cpu_bind()
75 	 * Bind riscv-timer driver on boot hart.  in riscv_cpu_bind()
77 	 * We only instantiate one timer device which is enough for U-Boot.  in riscv_cpu_bind()
78 	 * Pass the "timebase-frequency" value as the driver data for the  in riscv_cpu_bind()
84 	if (plat->cpu_id == gd->arch.boot_hart && plat->timebase_freq) {  in riscv_cpu_bind()
92 					     plat->timebase_freq, ofnode_null(),  in riscv_cpu_bind()