Lines Matching full:gate
16 [CLK_AHB_OTG] = GATE(0x060, BIT(0)),
17 [CLK_AHB_EHCI0] = GATE(0x060, BIT(1)),
18 [CLK_AHB_OHCI0] = GATE(0x060, BIT(2)),
19 [CLK_AHB_EHCI1] = GATE(0x060, BIT(3)),
20 [CLK_AHB_OHCI1] = GATE(0x060, BIT(4)),
21 [CLK_AHB_MMC0] = GATE(0x060, BIT(8)),
22 [CLK_AHB_MMC1] = GATE(0x060, BIT(9)),
23 [CLK_AHB_MMC2] = GATE(0x060, BIT(10)),
24 [CLK_AHB_MMC3] = GATE(0x060, BIT(11)),
25 [CLK_AHB_EMAC] = GATE(0x060, BIT(17)),
26 [CLK_AHB_SPI0] = GATE(0x060, BIT(20)),
27 [CLK_AHB_SPI1] = GATE(0x060, BIT(21)),
28 [CLK_AHB_SPI2] = GATE(0x060, BIT(22)),
29 [CLK_AHB_SPI3] = GATE(0x060, BIT(23)),
31 [CLK_AHB_GMAC] = GATE(0x064, BIT(17)),
33 [CLK_APB1_UART0] = GATE(0x06c, BIT(16)),
34 [CLK_APB1_UART1] = GATE(0x06c, BIT(17)),
35 [CLK_APB1_UART2] = GATE(0x06c, BIT(18)),
36 [CLK_APB1_UART3] = GATE(0x06c, BIT(19)),
37 [CLK_APB1_UART4] = GATE(0x06c, BIT(20)),
38 [CLK_APB1_UART5] = GATE(0x06c, BIT(21)),
39 [CLK_APB1_UART6] = GATE(0x06c, BIT(22)),
40 [CLK_APB1_UART7] = GATE(0x06c, BIT(23)),
42 [CLK_SPI0] = GATE(0x0a0, BIT(31)),
43 [CLK_SPI1] = GATE(0x0a4, BIT(31)),
44 [CLK_SPI2] = GATE(0x0a8, BIT(31)),
46 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(6)),
47 [CLK_USB_OHCI1] = GATE(0x0cc, BIT(7)),
48 [CLK_USB_PHY] = GATE(0x0cc, BIT(8)),
50 [CLK_SPI3] = GATE(0x0d4, BIT(31)),