162 	rk_clrsetreg(&pll->con0, CLKR_MASK | PLL_OD_MASK,  in rkclk_set_pll()
164 	rk_clrsetreg(&pll->con1, CLKF_MASK, div->nf - 1);  in rkclk_set_pll()
165 	rk_clrsetreg(&pll->con2, PLL_BWADJ_MASK, (div->nf >> 1) - 1);  in rkclk_set_pll()
205 	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,  in rkclk_configure_ddr()
215 	rk_clrsetreg(&cru->cru_mode_con, DPLL_MODE_MASK,  in rkclk_configure_ddr()
325 			rk_clrsetreg(&cru->cru_clksel_con[21], MAC_DIV_CON_MASK,  in rockchip_mac_set_clk()
347 	rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK,  in rockchip_vop_set_clk()
358 	rk_clrsetreg(&cru->cru_mode_con, NPLL_MODE_MASK,  in rockchip_vop_set_clk()
364 		rk_clrsetreg(&cru->cru_clksel_con[27], 0xff << 8 | 3 << 0,  in rockchip_vop_set_clk()
368 		rk_clrsetreg(&cru->cru_clksel_con[29], 0xff << 8 | 3 << 6,  in rockchip_vop_set_clk()
428 	rk_clrsetreg(&cru->cru_mode_con,  in rkclk_init()
457 	rk_clrsetreg(&cru->cru_clksel_con[1],  in rkclk_init()
480 	rk_clrsetreg(&cru->cru_clksel_con[10],  in rkclk_init()
489 	rk_clrsetreg(&cru->cru_mode_con,  in rkclk_init()
498 	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,  in rk3288_clk_configure_cpu()
513 	rk_clrsetreg(&cru->cru_clksel_con[0],  in rk3288_clk_configure_cpu()
524 	rk_clrsetreg(&cru->cru_clksel_con[37],  in rk3288_clk_configure_cpu()
532 	rk_clrsetreg(&cru->cru_mode_con, APLL_MODE_MASK,  in rk3288_clk_configure_cpu()
628 		rk_clrsetreg(&cru->cru_clksel_con[12],  in rockchip_mmc_set_clk()
635 		rk_clrsetreg(&cru->cru_clksel_con[11],  in rockchip_mmc_set_clk()
642 		rk_clrsetreg(&cru->cru_clksel_con[12],  in rockchip_mmc_set_clk()
694 		rk_clrsetreg(&cru->cru_clksel_con[25],  in rockchip_spi_set_clk()
700 		rk_clrsetreg(&cru->cru_clksel_con[25],  in rockchip_spi_set_clk()
706 		rk_clrsetreg(&cru->cru_clksel_con[39],  in rockchip_spi_set_clk()
736 	rk_clrsetreg(&cru->cru_clksel_con[24],  in rockchip_saradc_set_clk()
847 			rk_clrsetreg(&cru->cru_clksel_con[31],  in rk3288_clk_set_rate()
852 			rk_clrsetreg(&cru->cru_clksel_con[31],  in rk3288_clk_set_rate()
906 		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK, 0);  in rk3288_gmac_set_parent()
922 		rk_clrsetreg(&cru->cru_clksel_con[21], RMII_EXTCLK_MASK,  in rk3288_gmac_set_parent()