Lines Matching refs:parent
89 struct cpg_mssr_info *info, struct clk *parent) in gen3_clk_get_parent() argument
100 parent->dev = clk->dev; in gen3_clk_get_parent()
101 parent->id = core->parent >> (priv->sscg ? 16 : 0); in gen3_clk_get_parent()
102 parent->id &= 0xffff; in gen3_clk_get_parent()
107 return renesas_clk_get_parent(clk, info, parent); in gen3_clk_get_parent()
115 struct clk parent; in gen3_clk_setup_sdif_div() local
118 ret = gen3_clk_get_parent(priv, clk, info, &parent); in gen3_clk_setup_sdif_div()
124 if (renesas_clk_is_mod(&parent)) in gen3_clk_setup_sdif_div()
127 ret = renesas_clk_get_core(&parent, info, &core); in gen3_clk_setup_sdif_div()
159 struct clk parent; in gen3_clk_get_rate64() local
169 ret = gen3_clk_get_parent(priv, clk, info, &parent); in gen3_clk_get_rate64()
176 rate = gen3_clk_get_rate64(&parent); in gen3_clk_get_rate64()
178 __func__, __LINE__, parent.id, rate); in gen3_clk_get_rate64()
205 rate = gen3_clk_get_rate64(&parent) / pll_config->extal_div; in gen3_clk_get_rate64()
208 core->parent, pll_config->extal_div, rate); in gen3_clk_get_rate64()
214 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
216 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
220 rate = gen3_clk_get_rate64(&parent) * pll_config->pll1_mult; in gen3_clk_get_rate64()
224 core->parent, pll_config->pll1_mult, in gen3_clk_get_rate64()
231 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
233 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
237 rate = gen3_clk_get_rate64(&parent) * pll_config->pll3_mult; in gen3_clk_get_rate64()
241 core->parent, pll_config->pll3_mult, in gen3_clk_get_rate64()
248 rate = gen3_clk_get_rate64(&parent) * mult; in gen3_clk_get_rate64()
250 __func__, __LINE__, core->parent, mult, rate); in gen3_clk_get_rate64()
254 rate = (gen3_clk_get_rate64(&parent) * core->mult) / core->div; in gen3_clk_get_rate64()
257 core->parent, core->mult, core->div, rate); in gen3_clk_get_rate64()
262 rate = gen3_clk_get_rate64(&parent) / div; in gen3_clk_get_rate64()
265 (core->parent >> (priv->sscg ? 16 : 0)) & 0xffff, in gen3_clk_get_rate64()
277 rate = gen3_clk_get_rate64(&parent) / in gen3_clk_get_rate64()
281 core->parent, cpg_sd_div_table[i].div, rate); in gen3_clk_get_rate64()
289 rate = gen3_clk_get_rate64(&parent); in gen3_clk_get_rate64()
308 core->parent, prediv, postdiv, rate); in gen3_clk_get_rate64()