83 					   u32 fin, u32 pcw, int postdiv)  in __mtk_pll_recalc_rate()  argument
93 	vco = (u64)fin * pcw;  in __mtk_pll_recalc_rate()
112 static void mtk_pll_set_rate_regs(struct clk *clk, u32 pcw, int postdiv)  in mtk_pll_set_rate_regs()  argument
131 	val |= pcw << pll->pcw_shift;  in mtk_pll_set_rate_regs()
148 static void mtk_pll_calc_values(struct clk *clk, u32 *pcw, u32 *postdiv,  in mtk_pll_calc_values()  argument
170 	*pcw = (u32)_pcw;  in mtk_pll_calc_values()
175 	u32 pcw = 0;  in mtk_apmixedsys_set_rate()  local
178 	mtk_pll_calc_values(clk, &pcw, &postdiv, rate);  in mtk_apmixedsys_set_rate()
179 	mtk_pll_set_rate_regs(clk, pcw, postdiv);  in mtk_apmixedsys_set_rate()
189 	u32 pcw;  in mtk_apmixedsys_get_rate()  local
195 	pcw = readl(priv->base + pll->pcw_reg) >> pll->pcw_shift;  in mtk_apmixedsys_get_rate()
196 	pcw &= GENMASK(pll->pcwbits - 1, 0);  in mtk_apmixedsys_get_rate()
199 				     pcw, postdiv);  in mtk_apmixedsys_get_rate()