55 static void *zynq_clk_get_register(enum zynq_clk id)  in zynq_clk_get_register()
101 static enum zynq_clk zynq_clk_get_cpu_pll(u32 clk_ctrl)  in zynq_clk_get_cpu_pll()
116 static enum zynq_clk zynq_clk_get_peripheral_pll(u32 clk_ctrl)  in zynq_clk_get_peripheral_pll()
131 static ulong zynq_clk_get_pll_rate(struct zynq_clk_priv *priv, enum zynq_clk id)  in zynq_clk_get_pll_rate()
152 static enum zynq_clk_rclk zynq_clk_get_gem_rclk(enum zynq_clk id)  in zynq_clk_get_gem_rclk()
169 static ulong zynq_clk_get_cpu_rate(struct zynq_clk_priv *priv, enum zynq_clk id)  in zynq_clk_get_cpu_rate()
172 	enum zynq_clk pll;  in zynq_clk_get_cpu_rate()
240 					  enum zynq_clk id, bool two_divs)  in zynq_clk_get_peripheral_rate()
242 	enum zynq_clk pll;  in zynq_clk_get_peripheral_rate()
270 static ulong zynq_clk_get_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id)  in zynq_clk_get_gem_rate()
314 					  enum zynq_clk id, ulong rate,  in zynq_clk_set_peripheral_rate()
317 	enum zynq_clk pll;  in zynq_clk_set_peripheral_rate()
348 static ulong zynq_clk_set_gem_rate(struct zynq_clk_priv *priv, enum zynq_clk id,  in zynq_clk_set_gem_rate()
371 	enum zynq_clk id = clk->id;  in zynq_clk_get_rate()
406 	enum zynq_clk id = clk->id;  in zynq_clk_set_rate()
427 	enum zynq_clk id = clk->id;  in zynq_clk_get_rate()
479 U_BOOT_DRIVER(zynq_clk) = {