Lines Matching +full:assigned +full:- +full:clock +full:- +full:rates
1 // SPDX-License-Identifier: GPL-2.0+
11 #include <clk-uclass.h>
14 #include <dt-structs.h>
19 return (const struct clk_ops *)dev->driver->ops; in clk_dev_ops()
30 return -ENOSYS; in clk_get_by_index_platdata()
31 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev); in clk_get_by_index_platdata()
34 clk->id = cells[0].arg[0]; in clk_get_by_index_platdata()
44 if (args->args_count > 1) { in clk_of_xlate_default()
45 debug("Invaild args_count: %d\n", args->args_count); in clk_of_xlate_default()
46 return -EINVAL; in clk_of_xlate_default()
49 if (args->args_count) in clk_of_xlate_default()
50 clk->id = args->args[0]; in clk_of_xlate_default()
52 clk->id = 0; in clk_of_xlate_default()
68 clk->dev = NULL; in clk_get_by_indexed_prop()
70 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0, in clk_get_by_indexed_prop()
85 clk->dev = dev_clk; in clk_get_by_indexed_prop()
89 if (ops->of_xlate) in clk_get_by_indexed_prop()
90 ret = ops->of_xlate(clk, &args); in clk_get_by_indexed_prop()
110 bulk->count = 0; in clk_get_bulk()
112 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells"); in clk_get_bulk()
116 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL); in clk_get_bulk()
117 if (!bulk->clks) in clk_get_bulk()
118 return -ENOMEM; in clk_get_bulk()
121 ret = clk_get_by_index(dev, i, &bulk->clks[i]); in clk_get_bulk()
125 ++bulk->count; in clk_get_bulk()
131 err = clk_release_all(bulk->clks, bulk->count); in clk_get_bulk()
146 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents", in clk_set_default_parents()
147 "#clock-cells"); in clk_set_default_parents()
149 debug("%s: could not read assigned-clock-parents for %p\n", in clk_set_default_parents()
155 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents", in clk_set_default_parents()
157 /* If -ENOENT, this is a no-op entry */ in clk_set_default_parents()
158 if (ret == -ENOENT) in clk_set_default_parents()
162 debug("%s: could not get parent clock %d for %s\n", in clk_set_default_parents()
167 ret = clk_get_by_indexed_prop(dev, "assigned-clocks", in clk_set_default_parents()
170 debug("%s: could not get assigned clock %d for %s\n", in clk_set_default_parents()
178 * Not all drivers may support clock-reparenting (as of now). in clk_set_default_parents()
181 if (ret == -ENOSYS) in clk_set_default_parents()
185 debug("%s: failed to reparent clock %d for %s\n", in clk_set_default_parents()
201 u32 *rates = NULL; in clk_set_default_rates() local
203 size = dev_read_size(dev, "assigned-clock-rates"); in clk_set_default_rates()
208 rates = calloc(num_rates, sizeof(u32)); in clk_set_default_rates()
209 if (!rates) in clk_set_default_rates()
210 return -ENOMEM; in clk_set_default_rates()
212 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates); in clk_set_default_rates()
217 /* If 0 is passed, this is a no-op */ in clk_set_default_rates()
218 if (!rates[index]) in clk_set_default_rates()
221 ret = clk_get_by_indexed_prop(dev, "assigned-clocks", in clk_set_default_rates()
224 debug("%s: could not get assigned clock %d for %s\n", in clk_set_default_rates()
229 ret = clk_set_rate(&clk, rates[index]); in clk_set_default_rates()
231 debug("%s: failed to set rate on clock index %d (%ld) for %s\n", in clk_set_default_rates()
238 free(rates); in clk_set_default_rates()
246 /* If this not in SPL and pre-reloc state, don't take any action. */ in clk_set_defaults()
247 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC))) in clk_set_defaults()
269 clk->dev = NULL; in clk_get_by_name()
271 index = dev_read_stringlist_search(dev, "clock-names", name); in clk_get_by_name()
287 /* check if clock has been previously requested */ in clk_release_all()
292 if (ret && ret != -ENOSYS) in clk_release_all()
296 if (ret && ret != -ENOSYS) in clk_release_all()
311 clk->dev = dev; in clk_request()
313 if (!ops->request) in clk_request()
316 return ops->request(clk); in clk_request()
321 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_free()
325 if (!ops->free) in clk_free()
328 return ops->free(clk); in clk_free()
333 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_get_rate()
337 if (!ops->get_rate) in clk_get_rate()
338 return -ENOSYS; in clk_get_rate()
340 return ops->get_rate(clk); in clk_get_rate()
345 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_set_rate()
349 if (!ops->set_rate) in clk_set_rate()
350 return -ENOSYS; in clk_set_rate()
352 return ops->set_rate(clk, rate); in clk_set_rate()
357 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_set_parent()
361 if (!ops->set_parent) in clk_set_parent()
362 return -ENOSYS; in clk_set_parent()
364 return ops->set_parent(clk, parent); in clk_set_parent()
369 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_enable()
373 if (!ops->enable) in clk_enable()
374 return -ENOSYS; in clk_enable()
376 return ops->enable(clk); in clk_enable()
383 for (i = 0; i < bulk->count; i++) { in clk_enable_bulk()
384 ret = clk_enable(&bulk->clks[i]); in clk_enable_bulk()
385 if (ret < 0 && ret != -ENOSYS) in clk_enable_bulk()
394 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_disable()
398 if (!ops->disable) in clk_disable()
399 return -ENOSYS; in clk_disable()
401 return ops->disable(clk); in clk_disable()
408 for (i = 0; i < bulk->count; i++) { in clk_disable_bulk()
409 ret = clk_disable(&bulk->clks[i]); in clk_disable_bulk()
410 if (ret < 0 && ret != -ENOSYS) in clk_disable_bulk()