Lines Matching +full:- +full:clk

1 // SPDX-License-Identifier: GPL-2.0+
10 #include <clk.h>
11 #include <clk-uclass.h>
14 #include <dt-structs.h>
19 return (const struct clk_ops *)dev->driver->ops; in clk_dev_ops()
25 struct phandle_1_arg *cells, struct clk *clk) in clk_get_by_index_platdata() argument
30 return -ENOSYS; in clk_get_by_index_platdata()
31 ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev); in clk_get_by_index_platdata()
34 clk->id = cells[0].arg[0]; in clk_get_by_index_platdata()
39 static int clk_of_xlate_default(struct clk *clk, in clk_of_xlate_default() argument
42 debug("%s(clk=%p)\n", __func__, clk); in clk_of_xlate_default()
44 if (args->args_count > 1) { in clk_of_xlate_default()
45 debug("Invaild args_count: %d\n", args->args_count); in clk_of_xlate_default()
46 return -EINVAL; in clk_of_xlate_default()
49 if (args->args_count) in clk_of_xlate_default()
50 clk->id = args->args[0]; in clk_of_xlate_default()
52 clk->id = 0; in clk_of_xlate_default()
58 int index, struct clk *clk) in clk_get_by_indexed_prop() argument
65 debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk); in clk_get_by_indexed_prop()
67 assert(clk); in clk_get_by_indexed_prop()
68 clk->dev = NULL; in clk_get_by_indexed_prop()
70 ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0, in clk_get_by_indexed_prop()
85 clk->dev = dev_clk; in clk_get_by_indexed_prop()
89 if (ops->of_xlate) in clk_get_by_indexed_prop()
90 ret = ops->of_xlate(clk, &args); in clk_get_by_indexed_prop()
92 ret = clk_of_xlate_default(clk, &args); in clk_get_by_indexed_prop()
98 return clk_request(dev_clk, clk); in clk_get_by_indexed_prop()
101 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk) in clk_get_by_index() argument
103 return clk_get_by_indexed_prop(dev, "clocks", index, clk); in clk_get_by_index()
110 bulk->count = 0; in clk_get_bulk()
112 count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells"); in clk_get_bulk()
116 bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL); in clk_get_bulk()
117 if (!bulk->clks) in clk_get_bulk()
118 return -ENOMEM; in clk_get_bulk()
121 ret = clk_get_by_index(dev, i, &bulk->clks[i]); in clk_get_bulk()
125 ++bulk->count; in clk_get_bulk()
131 err = clk_release_all(bulk->clks, bulk->count); in clk_get_bulk()
141 struct clk clk, parent_clk; in clk_set_default_parents() local
146 num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents", in clk_set_default_parents()
147 "#clock-cells"); in clk_set_default_parents()
149 debug("%s: could not read assigned-clock-parents for %p\n", in clk_set_default_parents()
155 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents", in clk_set_default_parents()
157 /* If -ENOENT, this is a no-op entry */ in clk_set_default_parents()
158 if (ret == -ENOENT) in clk_set_default_parents()
167 ret = clk_get_by_indexed_prop(dev, "assigned-clocks", in clk_set_default_parents()
168 index, &clk); in clk_set_default_parents()
175 ret = clk_set_parent(&clk, &parent_clk); in clk_set_default_parents()
178 * Not all drivers may support clock-reparenting (as of now). in clk_set_default_parents()
181 if (ret == -ENOSYS) in clk_set_default_parents()
196 struct clk clk; in clk_set_default_rates() local
203 size = dev_read_size(dev, "assigned-clock-rates"); in clk_set_default_rates()
210 return -ENOMEM; in clk_set_default_rates()
212 ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates); in clk_set_default_rates()
217 /* If 0 is passed, this is a no-op */ in clk_set_default_rates()
221 ret = clk_get_by_indexed_prop(dev, "assigned-clocks", in clk_set_default_rates()
222 index, &clk); in clk_set_default_rates()
229 ret = clk_set_rate(&clk, rates[index]); in clk_set_default_rates()
232 __func__, index, clk.id, dev_read_name(dev)); in clk_set_default_rates()
246 /* If this not in SPL and pre-reloc state, don't take any action. */ in clk_set_defaults()
247 if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC))) in clk_set_defaults()
264 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk) in clk_get_by_name() argument
268 debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk); in clk_get_by_name()
269 clk->dev = NULL; in clk_get_by_name()
271 index = dev_read_stringlist_search(dev, "clock-names", name); in clk_get_by_name()
277 return clk_get_by_index(dev, index, clk); in clk_get_by_name()
280 int clk_release_all(struct clk *clk, int count) in clk_release_all() argument
285 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]); in clk_release_all()
288 if (!clk[i].dev) in clk_release_all()
291 ret = clk_disable(&clk[i]); in clk_release_all()
292 if (ret && ret != -ENOSYS) in clk_release_all()
295 ret = clk_free(&clk[i]); in clk_release_all()
296 if (ret && ret != -ENOSYS) in clk_release_all()
305 int clk_request(struct udevice *dev, struct clk *clk) in clk_request() argument
309 debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk); in clk_request()
311 clk->dev = dev; in clk_request()
313 if (!ops->request) in clk_request()
316 return ops->request(clk); in clk_request()
319 int clk_free(struct clk *clk) in clk_free() argument
321 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_free()
323 debug("%s(clk=%p)\n", __func__, clk); in clk_free()
325 if (!ops->free) in clk_free()
328 return ops->free(clk); in clk_free()
331 ulong clk_get_rate(struct clk *clk) in clk_get_rate() argument
333 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_get_rate()
335 debug("%s(clk=%p)\n", __func__, clk); in clk_get_rate()
337 if (!ops->get_rate) in clk_get_rate()
338 return -ENOSYS; in clk_get_rate()
340 return ops->get_rate(clk); in clk_get_rate()
343 ulong clk_set_rate(struct clk *clk, ulong rate) in clk_set_rate() argument
345 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_set_rate()
347 debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate); in clk_set_rate()
349 if (!ops->set_rate) in clk_set_rate()
350 return -ENOSYS; in clk_set_rate()
352 return ops->set_rate(clk, rate); in clk_set_rate()
355 int clk_set_parent(struct clk *clk, struct clk *parent) in clk_set_parent() argument
357 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_set_parent()
359 debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent); in clk_set_parent()
361 if (!ops->set_parent) in clk_set_parent()
362 return -ENOSYS; in clk_set_parent()
364 return ops->set_parent(clk, parent); in clk_set_parent()
367 int clk_enable(struct clk *clk) in clk_enable() argument
369 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_enable()
371 debug("%s(clk=%p)\n", __func__, clk); in clk_enable()
373 if (!ops->enable) in clk_enable()
374 return -ENOSYS; in clk_enable()
376 return ops->enable(clk); in clk_enable()
383 for (i = 0; i < bulk->count; i++) { in clk_enable_bulk()
384 ret = clk_enable(&bulk->clks[i]); in clk_enable_bulk()
385 if (ret < 0 && ret != -ENOSYS) in clk_enable_bulk()
392 int clk_disable(struct clk *clk) in clk_disable() argument
394 const struct clk_ops *ops = clk_dev_ops(clk->dev); in clk_disable()
396 debug("%s(clk=%p)\n", __func__, clk); in clk_disable()
398 if (!ops->disable) in clk_disable()
399 return -ENOSYS; in clk_disable()
401 return ops->disable(clk); in clk_disable()
408 for (i = 0; i < bulk->count; i++) { in clk_disable_bulk()
409 ret = clk_disable(&bulk->clks[i]); in clk_disable_bulk()
410 if (ret < 0 && ret != -ENOSYS) in clk_disable_bulk()
417 UCLASS_DRIVER(clk) = {
419 .name = "clk",