403 	u32 clk_sel4 = readl(&scu->clk_sel4);  in ast2600_get_pclk2()  local
404 	u32 apb_div = ast2600_hpll_pclk2_div_table[((clk_sel4 >> 9) & 0x7)];  in ast2600_get_pclk2()
490 	u32 clk_sel = readl(&scu->clk_sel4);  in ast2600_get_sdio_clk_rate()
579 	u32 uart_sel = readl(&scu->clk_sel4);  in ast2600_get_uart_clk_rate()
1041 	clrsetbits_le32(&scu->clk_sel4, (GENMASK(26, 24) | GENMASK(18, 16)),  in ast2600_configure_mac34_clk()
1200 	reg_310 = readl(&p_scu->clk_sel4);  in ast2600_init_rmii_clk()
1216 	writel(reg_310, &p_scu->clk_sel4);  in ast2600_init_rmii_clk()
1310 	u32 clk_sel = readl(&scu->clk_sel4);  in ast2600_enable_extsdclk()
1329 	writel(clk_sel, &scu->clk_sel4);  in ast2600_enable_extsdclk()
1332 	setbits_le32(&scu->clk_sel4, enableclk_bit);  in ast2600_enable_extsdclk()
1575 			setbits_le32(&priv->scu->clk_sel4,  in ast2600_clk_probe()