drivers/bios_emulator/bios.c

77 	if (M.x86.R_AH == 0x12 && M.x86.R_BL == 0x32) {  in int42()
78 		if (M.x86.R_AL == 0) {  in int42()
82 		} else if (M.x86.R_AL == 1) {  in int42()
90 			     M.x86.R_AL);  in int42()
97 		     M.x86.R_AH, M.x86.R_AL, M.x86.R_BL);  in int42()
162 	switch (M.x86.R_AX) {
164 		M.x86.R_AL = 0x00;	/* no config space/special cycle generation support */
165 		M.x86.R_EDX = 0x20494350;	/* " ICP" */
166 		M.x86.R_BX = 0x0210;	/* Version 2.10 */
167 		M.x86.R_CL = 0;	/* Max bus number in system */
171 		M.x86.R_AH = DEVICE_NOT_FOUND;
173 		if (M.x86.R_DX == _BE_env.vgaInfo.VendorID &&
174 		    M.x86.R_CX == _BE_env.vgaInfo.DeviceID && M.x86.R_SI == 0) {
176 		if (M.x86.R_DX == _BE_env.vgaInfo.pciInfo->VendorID &&
177 		    M.x86.R_CX == _BE_env.vgaInfo.pciInfo->DeviceID &&
178 		    M.x86.R_SI == 0) {
180 			M.x86.R_AH = SUCCESSFUL;
181 			M.x86.R_BX = pciSlot;
183 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
186 		M.x86.R_AH = DEVICE_NOT_FOUND;
203 		if (M.x86.R_CL == interface && M.x86.R_CH == subclass
204 		    && (u8) (M.x86.R_ECX >> 16) == baseclass) {
206 		if (M.x86.R_CL == _BE_env.vgaInfo.pciInfo->Interface &&
207 		    M.x86.R_CH == _BE_env.vgaInfo.pciInfo->SubClass &&
208 		    (u8) (M.x86.R_ECX >> 16) ==
211 			M.x86.R_AH = SUCCESSFUL;
212 			M.x86.R_BX = pciSlot;
214 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
217 		M.x86.R_AH = BAD_REGISTER_NUMBER;
218 		if (M.x86.R_BX == pciSlot) {
219 			M.x86.R_AH = SUCCESSFUL;
222 			dm_pci_read_config8(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
223 					    &M.x86.R_CL);
225 			pci_read_config_byte(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
226 					     &M.x86.R_CL);
229 			M.x86.R_CL =
230 			    (u8) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_BYTE,
234 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
237 		M.x86.R_AH = BAD_REGISTER_NUMBER;
238 		if (M.x86.R_BX == pciSlot) {
239 			M.x86.R_AH = SUCCESSFUL;
242 			dm_pci_read_config16(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
243 					     &M.x86.R_CX);
245 			pci_read_config_word(_BE_env.vgaInfo.pcidev, M.x86.R_DI,
246 					     &M.x86.R_CX);
249 			M.x86.R_CX =
250 			    (u16) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_WORD,
254 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
257 		M.x86.R_AH = BAD_REGISTER_NUMBER;
258 		if (M.x86.R_BX == pciSlot) {
259 			M.x86.R_AH = SUCCESSFUL;
263 					     M.x86.R_DI, &M.x86.R_ECX);
266 					      M.x86.R_DI, &M.x86.R_ECX);
269 			M.x86.R_ECX =
270 			    (u32) PCI_accessReg(M.x86.R_DI, 0, PCI_READ_DWORD,
274 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
277 		M.x86.R_AH = BAD_REGISTER_NUMBER;
278 		if (M.x86.R_BX == pciSlot) {
279 			M.x86.R_AH = SUCCESSFUL;
283 					     M.x86.R_DI, M.x86.R_CL);
286 					      M.x86.R_DI, M.x86.R_CL);
289 			PCI_accessReg(M.x86.R_DI, M.x86.R_CL, PCI_WRITE_BYTE,
293 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
296 		M.x86.R_AH = BAD_REGISTER_NUMBER;
297 		if (M.x86.R_BX == pciSlot) {
298 			M.x86.R_AH = SUCCESSFUL;
302 					      M.x86.R_DI, M.x86.R_CX);
305 					      M.x86.R_DI, M.x86.R_CX);
308 			PCI_accessReg(M.x86.R_DI, M.x86.R_CX, PCI_WRITE_WORD,
312 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
315 		M.x86.R_AH = BAD_REGISTER_NUMBER;
316 		if (M.x86.R_BX == pciSlot) {
317 			M.x86.R_AH = SUCCESSFUL;
321 					      M.x86.R_DI, M.x86.R_ECX);
324 					       M.x86.R_DI, M.x86.R_ECX);
327 			PCI_accessReg(M.x86.R_DI, M.x86.R_ECX, PCI_WRITE_DWORD,
331 		CONDITIONAL_SET_FLAG((M.x86.R_AH != SUCCESSFUL), F_CF);
335 		       M.x86.R_AX);