44 *		timer port access. Made all the VGA port except reading 0x3c3
45 *		be emulated. Seems like reading 0x3c3 should return the high
59 static u8 BE_model = 0xFC;
60 static u8 BE_submodel = 0x00;
88 	if (addr >= 0xC0000 && addr <= _BE_env.biosmem_limit) {  in BE_memaddr()
89 		return (u8*)(_BE_env.biosmem_base + addr - 0xC0000);  in BE_memaddr()
90 	} else if (addr > _BE_env.biosmem_limit && addr < 0xD0000) {  in BE_memaddr()
94 	} else if (addr >= 0xA0000 && addr <= 0xBFFFF) {  in BE_memaddr()
95 		return (u8*)(_BE_env.busmem_base + addr - 0xA0000);  in BE_memaddr()
98 	else if (addr >= 0xD0000 && addr <= 0xFFFFF) {  in BE_memaddr()
102 		    return (u8 *)_BE_env.busmem_base + addr - 0xA0000;  in BE_memaddr()
105 	else if (addr >= 0xFFFF5 && addr < 0xFFFFE) {  in BE_memaddr()
108 		return (u8 *)(BE_biosDate + addr - 0xFFFF5);  in BE_memaddr()
109 	} else if (addr == 0xFFFFE) {  in BE_memaddr()
113 	} else if (addr == 0xFFFFF) {  in BE_memaddr()
140 	if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)  in BE_rdb()
141 		return 0;  in BE_rdb()
161 	if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)  in BE_rdw()
162 		return 0;  in BE_rdw()
183 	if (_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)  in BE_rdl()
184 		return 0;  in BE_rdl()
203 	if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {  in BE_wrb()
219 	if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {  in BE_wrw()
237 	if (!(_BE_env.emulateVGA && addr >= 0xA0000 && addr <= 0xBFFFF)) {  in BE_wrl()
249 #define IS_TIMER_PORT(port) (0x40 <= port && port <= 0x43)
250 #define IS_CMOS_PORT(port)  (0x70 <= port && port <= 0x71)
251 /*#define IS_VGA_PORT(port)   (_BE_env.emulateVGA && 0x3C0 <= port && port <= 0x3DA)*/
252 #define IS_VGA_PORT(port)   (0x3C0 <= port && port <= 0x3DA)
253 #define IS_PCI_PORT(port)   (0xCF8 <= port && port <= 0xCFF)
254 #define IS_SPKR_PORT(port)  (port == 0x61)
269 	u8 val = 0xff;  in VGA_inpb()
273 	case 0x3C0:  in VGA_inpb()
278 		if (_BE_env.flipFlop3C0 == 0) {  in VGA_inpb()
288 	case 0x3C1:  in VGA_inpb()
292 	case 0x3CC:  in VGA_inpb()
294 	case 0x3C4:  in VGA_inpb()
296 	case 0x3C5:  in VGA_inpb()
300 	case 0x3C6:  in VGA_inpb()
302 	case 0x3C7:  in VGA_inpb()
304 	case 0x3C8:  in VGA_inpb()
306 	case 0x3C9:  in VGA_inpb()
310 	case 0x3CE:  in VGA_inpb()
312 	case 0x3CF:  in VGA_inpb()
316 	case 0x3D4:  in VGA_inpb()
317 		if (_BE_env.emu3C2 & 0x1)  in VGA_inpb()
320 	case 0x3D5:  in VGA_inpb()
321 		if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))  in VGA_inpb()
324 	case 0x3DA:  in VGA_inpb()
325 		_BE_env.flipFlop3C0 = 0;  in VGA_inpb()
327 		_BE_env.emu3DA ^= 0x9;  in VGA_inpb()
340 we only emulate timer 0 which is the only timer that the BIOS code appears
346 	case 0x3C0:  in VGA_outpb()
351 		if (_BE_env.flipFlop3C0 == 0) {  in VGA_outpb()
361 	case 0x3C2:  in VGA_outpb()
364 	case 0x3C4:  in VGA_outpb()
367 	case 0x3C5:  in VGA_outpb()
371 	case 0x3C6:  in VGA_outpb()
374 	case 0x3C7:  in VGA_outpb()
378 	case 0x3C8:  in VGA_outpb()
382 	case 0x3C9:  in VGA_outpb()
386 	case 0x3CE:  in VGA_outpb()
389 	case 0x3CF:  in VGA_outpb()
393 	case 0x3D4:  in VGA_outpb()
394 		if (_BE_env.emu3C2 & 0x1)  in VGA_outpb()
397 	case 0x3D5:  in VGA_outpb()
398 		if ((_BE_env.emu3C2 & 0x1) && (_BE_env.emu3D4 < CRT_C))  in VGA_outpb()
430 	regOffset += (_BE_env.configAddress & 0xFF);  in BE_accessReg()
431 	function = (_BE_env.configAddress >> 8) & 0x7;  in BE_accessReg()
432 	device = (_BE_env.configAddress >> 11) & 0x1F;  in BE_accessReg()
433 	bus = (_BE_env.configAddress >> 16) & 0xFF;  in BE_accessReg()
456 			return 0;  in BE_accessReg()
461 			return 0;  in BE_accessReg()
466 			return 0;  in BE_accessReg()
469 	return 0;  in BE_accessReg()
474 	pciInfo.slot.i = 0;  in BE_accessReg()
475 	pciInfo.slot.p.Function = (_BE_env.configAddress >> 8) & 0x7;  in BE_accessReg()
476 	pciInfo.slot.p.Device = (_BE_env.configAddress >> 11) & 0x1F;  in BE_accessReg()
477 	pciInfo.slot.p.Bus = (_BE_env.configAddress >> 16) & 0xFF;  in BE_accessReg()
485 		return PCI_accessReg((_BE_env.configAddress & 0xFF) + regOffset,  in BE_accessReg()
487 	return 0;  in BE_accessReg()
505 		if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port  in PCI_inp()
506 		    && port <= 0xCFF)  in PCI_inp()
507 			return BE_accessReg(port - 0xCFC, 0, REG_READ_BYTE);  in PCI_inp()
510 		if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port  in PCI_inp()
511 		    && port <= 0xCFF)  in PCI_inp()
512 			return BE_accessReg(port - 0xCFC, 0, REG_READ_WORD);  in PCI_inp()
515 		if (port == 0xCF8)  in PCI_inp()
517 		else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)  in PCI_inp()
518 			return BE_accessReg(0, 0, REG_READ_DWORD);  in PCI_inp()
521 	return 0;  in PCI_inp()
536 		if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port  in PCI_outp()
537 		    && port <= 0xCFF)  in PCI_outp()
538 			BE_accessReg(port - 0xCFC, val, REG_WRITE_BYTE);  in PCI_outp()
541 		if ((_BE_env.configAddress & 0x80000000) && 0xCFC <= port  in PCI_outp()
542 		    && port <= 0xCFF)  in PCI_outp()
543 			BE_accessReg(port - 0xCFC, val, REG_WRITE_WORD);  in PCI_outp()
546 		if (port == 0xCF8)  in PCI_outp()
548 			_BE_env.configAddress = val & 0x80FFFFFC;  in PCI_outp()
550 		else if ((_BE_env.configAddress & 0x80000000) && port == 0xCFC)  in PCI_outp()
551 			BE_accessReg(0, val, REG_WRITE_DWORD);  in PCI_outp()
572 	u8 val = 0;  in BE_inb()
576 		/*seems reading port 0x3c3 return the high 16 bit of io port*/  in BE_inb()
577 		if(port == 0x3c3)  in BE_inb()
590 	else if (port < 0x100) {  in BE_inb()
618 	u16 val = 0;  in BE_inw()
623 	else if (port < 0x100) {  in BE_inw()
651 	u32 val = 0;  in BE_inl()
656 	else if (port < 0x100) {  in BE_inl()
692 	else if (port < 0x100) {  in BE_outb()
722 	} else if (port < 0x100) {  in BE_outw()
750 	} else if (port < 0x100) {  in BE_outl()