Lines Matching refs:cmd_slot
351 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 cmd_slot, u32 opts) in ahci_fill_cmd_slot() argument
353 struct ahci_cmd_hdr *cmd_hdr = (struct ahci_cmd_hdr *)(pp->cmd_slot + in ahci_fill_cmd_slot()
354 AHCI_CMD_SLOT_SZ * cmd_slot); in ahci_fill_cmd_slot()
359 pp->cmd_slot->tbl_addr = cpu_to_le32((u32)pp->cmd_tbl & 0xffffffff); in ahci_fill_cmd_slot()
361 pp->cmd_slot->tbl_addr_hi = in ahci_fill_cmd_slot()
375 int sg_count = 0, cmd_slot = 0; in ahci_exec_ata_cmd() local
377 cmd_slot = AHCI_GET_CMD_SLOT(readl(&port_mmio->ci)); in ahci_exec_ata_cmd()
378 if (32 == cmd_slot) { in ahci_exec_ata_cmd()
398 ahci_fill_cmd_slot(pp, cmd_slot, opts); in ahci_exec_ata_cmd()
400 flush_cache((int)(pp->cmd_slot), AHCI_PORT_PRIV_DMA_SZ); in ahci_exec_ata_cmd()
401 writel_with_flush(1 << cmd_slot, &port_mmio->ci); in ahci_exec_ata_cmd()
404 0x1 << cmd_slot)) { in ahci_exec_ata_cmd()
408 invalidate_dcache_range((int)(pp->cmd_slot), in ahci_exec_ata_cmd()
409 (int)(pp->cmd_slot)+AHCI_PORT_PRIV_DMA_SZ); in ahci_exec_ata_cmd()
411 pp->cmd_slot->status); in ahci_exec_ata_cmd()
463 pp->cmd_slot = (struct ahci_cmd_hdr *)mem; in ahci_port_start()
464 debug("cmd_slot = 0x%x\n", (unsigned int) pp->cmd_slot); in ahci_port_start()
484 writel_with_flush((u32)pp->cmd_slot, &port_mmio->clb); in ahci_port_start()