device-tree-bindings/pinctrl/rockchip%2Cpinctrl.txt

6 muxing options with option 0 being the use as a GPIO.
8 Please refer to pinctrl-bindings.txt in this directory for details of the
12 The Rockchip pin configuration node is a node of a group of pins which can be
14 config of the pins in that group. The 'pins' selects the function mode(also
16 settings such as pull-up, etc.
19 defined as gpio sub-nodes of the pinmux controller.
22   - compatible: one of "rockchip,rk2928-pinctrl", "rockchip,rk3066a-pinctrl"
23 		       "rockchip,rk3066b-pinctrl", "rockchip,rk3188-pinctrl"
24 		       "rockchip,rk3288-pinctrl"
25   - rockchip,grf: phandle referencing a syscon providing the
29   - rockchip,pmu: phandle referencing a syscon providing the pmu registers
34   - reg: first element is the general register space of the iomux controller
39 Required properties for gpio sub nodes:
40   - compatible: "rockchip,gpio-bank"
41   - reg: register of the gpio bank (different than the iomux registerset)
42   - interrupts: base interrupt of the gpio bank in the interrupt controller
43   - clocks: clock that drives this bank
44   - gpio-controller: identifies the node as a gpio controller and pin bank.
45   - #gpio-cells: number of cells in GPIO specifier. Since the generic GPIO
47     GPIO binding documentation for description of particular cells.
48   - interrupt-controller: identifies the controller node as interrupt-parent.
49   - #interrupt-cells: the value of this property should be 2 and the interrupt
50     cells should use the standard two-cell scheme described in
51     bindings/interrupt-controller/interrupts.txt
53 Deprecated properties for gpio sub nodes:
54   - compatible: "rockchip,rk3188-gpio-bank0"
55   - reg: second element: separate pull register for rk3188 bank0, use
59   - rockchip,pins: 3 integers array, represents a group of pins mux and config
61     The MUX 0 means gpio and MUX 1 to N mean the specific device function.
63     to use, as described in pinctrl-bindings.txt in this directory.
67 #include <dt-bindings/pinctrl/rockchip.h>
72 	compatible = "rockchip,rk3066a-pinctrl";
75 	#address-cells = <1>;
76 	#size-cells = <1>;
77 	ranges;
80 		compatible = "rockchip,gpio-bank";
85 		gpio-controller;
86 		#gpio-cells = <2>;
88 		interrupt-controller;
89 		#interrupt-cells = <2>;
95 		bias-pull-pin-default
99 		uart2_xfer: uart2-xfer {
107 	compatible = "snps,dw-apb-uart";
110 	reg-shift = <2>;
111 	reg-io-width = <1>;
115 	pinctrl-names = "default";
116 	pinctrl-0 = <&uart2_xfer>;
122 		compatible = "rockchip,rk3188-pinctrl";
125 		#address-cells = <1>;
126 		#size-cells = <1>;
127 		ranges;
130 			compatible = "rockchip,rk3188-gpio-bank0";
135 			gpio-controller;
136 			#gpio-cells = <2>;
138 			interrupt-controller;
139 			#interrupt-cells = <2>;
143 			compatible = "rockchip,gpio-bank";
148 			gpio-controller;
149 			#gpio-cells = <2>;
151 			interrupt-controller;
152 			#interrupt-cells = <2>;