Lines Matching +full:2 +full:- +full:49
4 -------------------------------------------------------------------------------
6 -------------------------------------------------------------------------------
8 1 DEV_ALE[0] AU_I2SDO_SPDIFO GE0_RXD[2] TDM_DRX
9 2 DEV_AD[15] AU_I2SEXTCLK GE0_RXD[1] TDM_DTX
13 6 DEV_AD[11] - GE0_TXD[3] SPI0_CSn[2]
14 7 DEV_AD[10] - GE0_TXD[2] SPI0_CSn[1]
15 8 DEV_AD[9] - GE0_TXD[1] SPI0_CSn[0]
16 9 DEV_AD[8] - GE0_TXD[0] SPI0_MOSI
17 10 DEV_READYn - GE0_TXCTL SPI0_MISO
18 11 DEV_WEn[1] - GE0_TXCLKOUT SPI0_CLK
22 15 DEV_AD[7] - SPI1_MOSI -
23 16 DEV_AD[6] - SPI1_CLK -
24 17 DEV_AD[5] - - GE0_TXD[3]
25 18 DEV_AD[4] - - GE0_TXD[2]
26 19 DEV_AD[3] - - GE0_TXD[1]
27 20 DEV_AD[2] - - GE0_TXD[0]
28 21 DEV_AD[1] - - GE0_TXCTL
29 22 DEV_AD[0] - - GE0_TXCLKOUT
30 23 DEV_A[1] - - -
31 24 DEV_A[0] - - -
32 25 DEV_OEn - - - -
33 26 DEV_WEn[0] - - -
35 28 DEV_CSn[1] SPI1_CSn[0] MSS_GPIO[5] GE0_RXD[2]
36 29 DEV_CSn[2] SPI1_MOSI MSS_GPIO[6] GE0_RXD[1]
38 31 DEV_A[2] - MSS_GPIO[4] -
46 39 SDIO_WR_PROTECT - - AU_I2SBCLK PTP_CLK
50 43 SDIO_CARD_DETECT - SYNCE1_CLK AU_I2SEXTCLK
51 44 GE1_TXD[2] - - -
52 45 GE1_TXD[3] - - -
53 46 GE1_TXD[1] - - -
54 47 GE1_TXD[0] - - -
55 48 GE1_TXCTL_MII_TXEN - - -
56 49 GE1_TXCLKOUT MII_CRS - -
57 50 GE1_RXCLK MSS_TWSI_SDA - -
58 51 GE1_RXD[0] MSS_TWSI_SCK - -
59 52 GE1_RXD[1] SYNCE1_CLK - SYNCE2_CLK
60 53 GE1_RXD[2] - PTP_CLK -
62 55 GE1_RXCTL_MII_RXDV - PTP_PULSE -
63 56 - - - TDM_DRX
64 57 - MSS_TWSI_SDA PTP_PCLK_OUT TDM_INTn
65 58 - MSS_TWSI_SCK PTP_CLK TDM_RSTn
66 59 MSS_GPIO[7] SYNCE2_CLK - TDM_FSYNC
67 60 MSS_GPIO[6] - PTP_PULSE TDM_DTX
68 61 MSS_GPIO[5] - PTP_CLK TDM_PCLK
69 62 MSS_GPIO[4] SYNCE1_CLK PTP_PCLK_OUT -
71 -------------------------------------------------------------------------------
73 -------------------------------------------------------------------------------
74 0 - PTP_PULSE MSS_TWSI_SDA
75 1 - PTP_CLK MSS_TWSI_SCK
76 2 MSS_UART_RXD PTP_PCLK_OUT TWSI1_SCK
83 9 SPI1_MOSI - PCIe_RSTOUTn
86 12 - - -
87 13 - - -
89 15 - SPI0_MOSI -
90 16 - - -
91 17 - - -
92 18 - - -
93 19 - - -
94 20 - - -
95 21 - - -
96 22 - - -
97 23 AU_I2SMCLK - -
98 24 AU_I2SLRCLK - -
99 25 AU_I2SDO_SPDIFO - -
100 26 AU_I2SBCLK - -
101 27 SPI0_CSn[4] - -
105 31 - PCIe_RSTOUTn -
107 33 AU_I2SMCLK SDIO_BUS_PWR -
113 39 SPI0_CSn[1] - -
118 44 - - UART0_RTS
119 45 - - UART0_TXD
120 46 - - UART1_RTS
121 47 SPI1_CLK - UART1_TXD
122 48 SPI1_MOSI - -
123 49 SPI1_MISO - UART1_RXD
126 52 SPI1_CSn[2] - UART1_CTS
127 53 SPI1_CSn[3] - UART1_RXD
128 54 - - -
129 55 - - -
135 61 AU_I2SEXTCLK SPI0_CSn[2] UART0_TXD
138 -------------------------------------------------------------------------------
140 -------------------------------------------------------------------------------
143 2 UART1_RXD SATA0_PRESENT_ACTIVEn XG_MDC
145 4 UART3_RXD - GE_MDC
146 5 UART3_TXD - GE_MDIO
147 6 UART0_RXD PTP_PULSE -
148 7 UART0_TXD PTP_CLK -
150 9 - - SYNCE2_CLK
151 10 - - -
152 11 UART2_TXD SATA0_PRESENT_ACTIVEn -
153 12 - - -
154 13 MSS_SPI_MISO - -
155 14 MSS_SPI_CSn - -
156 15 MSS_SPI_MOSI - -
157 16 MSS_SPI_CLK - -
158 17 - - -
159 18 - - -
160 19 - - -
161 20 - - -
162 21 - - -
163 22 - - -
164 23 - - -
165 24 - - -
166 25 - - -
167 26 - - -
172 31 GE_MDC - -
175 34 - PCIe0_CLKREQ MSS_GPIO[2]
182 41 GE_MDC SATA1_PRESENT_ACTIVEn MSS_GPIO[2]
185 44 - - -
186 45 - PCIe_RSTOUTn -
187 46 - - -
188 47 GE_MDC CLKOUT -
189 48 XG_MDC - -
190 49 GE_MDIO PCIe0_CLKREQ SDIO_V18_EN
191 50 XG_MDIO - SDIO_PWR1[1]
192 51 - - SDIO_PWR1[0]
194 53 LED_STB - -
195 54 LED_DATA - SDIO_HW_RST
196 55 - - SDIO_LED
197 56 - SATA1_PRESENT_ACTIVEn -
198 57 - SATA0_PRESENT_ACTIVEn -
199 58 LED_CLK - -
200 59 LED_STB UART1_TXD -
201 60 LED_DATA UART1_RXD -
205 -------------------------------------------------------------------------------
207 -------------------------------------------------------------------------------
208 0 - - -
209 1 - - -
210 2 - - -
211 3 - - -
212 4 - - -
213 5 - - -
214 6 - - -
215 7 - - -
216 8 - - -
217 9 - - -
218 10 - - -
219 11 - CLKOUT_MPP_11 -
220 12 - - -
221 13 - - -
222 14 - - -
223 15 PTP_PULSE_CP2CP SAR_IN[5] -
224 16 - SAR_IN[3] -
225 17 - SAR_IN[6] -
226 18 PTP_CLK_CP2CP SAR_IN[11] -
227 19 WAKEUP_OUT_CP2CP SAR_IN[7] -
228 20 - SAR_IN[9] -
229 21 SEI_IN_CP2CP SAR_IN[8] -
230 22 WAKEUP_IN_CP2CP SAR_IN[10] -
231 23 LINK_RD_IN_CP2CP SAR_IN[4] -
232 24 - - -
233 25 - CLKOUT_MPP_25 -
234 26 - SAR_IN[0] -
235 27 REI_IN_CP2CP SAR_IN[1] -
236 28 LED_DATA SAR_IN[2] -
237 29 LED_STB AVS_FB_IN_CP2CP -
238 30 LED_CLK SAR_IN[13] -
239 31 - - -
240 32 - SAR_CP2CP_OUT[0] -
241 33 - SAR_CP2CP_OUT[1] -
242 34 - SAR_CP2CP_OUT[2] -
243 35 - SAR_CP2CP_OUT[3] -
244 36 - CLKIN -
245 37 LINK_RD_OUT_CP2CP SAR_CP2CP_OUT[4] -
246 38 PTP_PULSE_CP2CP SAR_CP2CP_OUT[5] -
247 39 - AVS_FB_OUT_CP2CP -
248 40 - - -
249 41 REI_OUT_CP2CP - -
250 42 - SAR_CP2CP_OUT[9] -
251 43 WAKEUP_OUT_CP2CP SAR_CP2CP_OUT[10] -
252 44 PTP_CLK_CP2CP SAR_CP2CP_OUT[11] -
253 45 - SAR_CP2CP_OUT[6] -
254 46 - SAR_CP2CP_OUT[13] -
255 47 - - -
256 48 WAKEUP_IN_CP2CP SAR_CP2CP_OUT[7] -
257 49 SEI_OUT_CP2CP SAR_CP2CP_OUT[8] -
258 50 - - -
259 51 - - -
260 52 - - -
261 53 SDIO_LED - -
262 54 SDIO_WR_PROTECT - -
263 55 SDIO_CARD_DETECT - -
264 56 - - SDIO0_CLK
265 57 - - SDIO0_CMD
266 58 - - SDIO0_D[0]
267 59 - - SDIO0_D[1]
268 60 - - SDIO0_D[2]
269 61 - - SDIO0_D[3]
270 62 - - -