Lines Matching +full:tx +full:- +full:delay +full:- +full:ps
4 clock delays. You can specify clock delay values by adding
5 micrel-specific properties to an Ethernet OF device node.
7 Note that these settings are applied after any phy-specific fixup from
14 value is 0, the maximum value is 1800, and it is incremented by 120ps
19 - rxc-skew-ps : Skew control of RXC pad
20 - rxdv-skew-ps : Skew control of RX CTL pad
21 - txc-skew-ps : Skew control of TXC pad
22 - txen-skew-ps : Skew control of TX CTL pad
23 - rxd0-skew-ps : Skew control of RX data 0 pad
24 - rxd1-skew-ps : Skew control of RX data 1 pad
25 - rxd2-skew-ps : Skew control of RX data 2 pad
26 - rxd3-skew-ps : Skew control of RX data 3 pad
27 - txd0-skew-ps : Skew control of TX data 0 pad
28 - txd1-skew-ps : Skew control of TX data 1 pad
29 - txd2-skew-ps : Skew control of TX data 2 pad
30 - txd3-skew-ps : Skew control of TX data 3 pad
35 value is 0, and the maximum is property-dependent. The increment
36 step is 60ps.
44 The following 5-bit values table apply to rxc-skew-ps and txc-skew-ps.
46 Pad Skew Value Delay (ps) Devicetree Value
47 ------------------------------------------------------
48 0_0000 -900ps 0
49 0_0001 -840ps 60
50 0_0010 -780ps 120
51 0_0011 -720ps 180
52 0_0100 -660ps 240
53 0_0101 -600ps 300
54 0_0110 -540ps 360
55 0_0111 -480ps 420
56 0_1000 -420ps 480
57 0_1001 -360ps 540
58 0_1010 -300ps 600
59 0_1011 -240ps 660
60 0_1100 -180ps 720
61 0_1101 -120ps 780
62 0_1110 -60ps 840
63 0_1111 0ps 900
64 1_0000 60ps 960
65 1_0001 120ps 1020
66 1_0010 180ps 1080
67 1_0011 240ps 1140
68 1_0100 300ps 1200
69 1_0101 360ps 1260
70 1_0110 420ps 1320
71 1_0111 480ps 1380
72 1_1000 540ps 1440
73 1_1001 600ps 1500
74 1_1010 660ps 1560
75 1_1011 720ps 1620
76 1_1100 780ps 1680
77 1_1101 840ps 1740
78 1_1110 900ps 1800
79 1_1111 960ps 1860
81 The following 4-bit values table apply to the txdX-skew-ps, rxdX-skew-ps
82 data pads, and the rxdv-skew-ps, txen-skew-ps control pads.
84 Pad Skew Value Delay (ps) Devicetree Value
85 ------------------------------------------------------
86 0000 -420ps 0
87 0001 -360ps 60
88 0010 -300ps 120
89 0011 -240ps 180
90 0100 -180ps 240
91 0101 -120ps 300
92 0110 -60ps 360
93 0111 0ps 420
94 1000 60ps 480
95 1001 120ps 540
96 1010 180ps 600
97 1011 240ps 660
98 1100 300ps 720
99 1101 360ps 780
100 1110 420ps 840
101 1111 480ps 900
107 - rxc-skew-ps : Skew control of RX clock pad
108 - txc-skew-ps : Skew control of TX clock pad
112 - rxdv-skew-ps : Skew control of RX CTL pad
113 - txen-skew-ps : Skew control of TX CTL pad
114 - rxd0-skew-ps : Skew control of RX data 0 pad
115 - rxd1-skew-ps : Skew control of RX data 1 pad
116 - rxd2-skew-ps : Skew control of RX data 2 pad
117 - rxd3-skew-ps : Skew control of RX data 3 pad
118 - txd0-skew-ps : Skew control of TX data 0 pad
119 - txd1-skew-ps : Skew control of TX data 1 pad
120 - txd2-skew-ps : Skew control of TX data 2 pad
121 - txd3-skew-ps : Skew control of TX data 3 pad
127 rxc-skew-ps = <1800>;
128 rxdv-skew-ps = <0>;
129 txc-skew-ps = <1800>;
130 txen-skew-ps = <0>;
134 /* Attach to an explicitly-specified PHY */
136 phy0: ethernet-phy@0 {
137 rxc-skew-ps = <1800>;
138 rxdv-skew-ps = <0>;
139 txc-skew-ps = <1800>;
140 txen-skew-ps = <0>;
147 phy-mode = "rgmii-id";
153 http://www.micrel.com/_PDF/Ethernet/datasheets/ksz9021rl-rn_ds.pdf
162 incorrectly specified the ps per step as 200ps/step instead of
163 120ps/step. The latest update to this document reflects the latest