Lines Matching +full:external +full:- +full:memory +full:- +full:controller
4 K3 based AM654 devices has DDR memory subsystem that comprises
5 Synopys DDR controller, Synopsis DDR phy and wrapper logic to
7 provides an interface to external SDRAM devices. This DDRSS driver
8 adds support for the initialization of the external SDRAM devices by
15 --------------------
16 - compatible: Shall be: "ti,am654-ddrss"
17 - reg-names ss - Map the sub system wrapper logic region
18 ctl - Map the controller region
19 phy - Map the PHY region
20 - reg: Contains the register map per reg-names.
21 - power-domains: Should contain a phandle to a PM domain provider node
24 doc/device-tree-bindings/power/ti,sci-pm-domain.txt
25 - clocks: Must contain an entry for enabling DDR clock. Should
27 usage in doc/device-tree-bindings/clock/ti,sci-clk.txt
31 --------------------
32 - clock-frequency: Frequency at which DDR pll should be locked.
37 memory-controller: memory-controller@298e000 {
38 compatible = "ti,am654-ddrss";
42 reg-names = "ss", "ctl", "phy";
44 power-domains = <&k3_pds 20>;
45 u-boot,dm-spl;