device-tree-bindings/gpio/nvidia%2Ctegra186-gpio.txt

4 controller. This binding document applies to both controllers. The register
42 extremely non-linear. The header file <dt-bindings/gpio/tegra186-gpio.h>
43 describes the port-level mapping. In that file, the naming convention for ports
45 sorted within a particular controller. Drivers need to map between the DT GPIO
52 both the overall controller HW module and the sets-of-ports as "controllers".
56 interrupt signals generated by a set-of-ports. The intent is for each generated
59 per-port-set signals is reported via a separate register. Thus, a driver needs
60 to know which status register to observe. This binding currently defines no
62 GPIO_${port}_INTERRUPT_STATUS_G1_0. Future revisions to the binding could
66 - compatible
69     - "nvidia,tegra186-gpio".
70     - "nvidia,tegra186-gpio-aon".
71 - reg-names
75     - "gpio": Mandatory. GPIO control registers. This may cover either:
80     - "security": Optional. Security configuration registers.
81     Users of this binding MUST look up entries in the reg property by name,
82     using this reg-names property to do so.
83 - reg
85     Must contain one entry per entry in the reg-names property, in a matching
87 - interrupts
92     - "nvidia,tegra186-gpio": 6 entries.
93     - "nvidia,tegra186-gpio-aon": 1 entry.
94 - gpio-controller
97 - #gpio-cells
98     Single-cell integer.
102     - The first cell is the pin number.
103         See <dt-bindings/gpio/tegra186-gpio.h>.
104     - The second cell contains flags:
105         - Bit 0 specifies polarity
106             - 0: Active-high (normal).
107             - 1: Active-low (inverted).
108 - interrupt-controller
111 - #interrupt-cells
112     Single-cell integer.
116     - The first cell is the GPIO number.
117         See <dt-bindings/gpio/tegra186-gpio.h>.
118     - The second cell is contains flags:
119         - Bits [3:0] indicate trigger type and level:
120             - 1: Low-to-high edge triggered.
121             - 2: High-to-low edge triggered.
122             - 4: Active high level-sensitive.
123             - 8: Active low level-sensitive.
128 #include <dt-bindings/interrupt-controller/irq.h>
131 	compatible = "nvidia,tegra186-gpio";
132 	reg-names = "security", "gpio";
143 	gpio-controller;
144 	#gpio-cells = <2>;
145 	interrupt-controller;
146 	#interrupt-cells = <2>;
150 	compatible = "nvidia,tegra186-gpio-aon";
151 	reg-names = "security", "gpio";
157 	gpio-controller;
158 	#gpio-cells = <2>;
159 	interrupt-controller;
160 	#interrupt-cells = <2>;